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Research Intern Sample Resume Format in Word Free Download

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Sample Template Example of Beautiful Excellent Professional Curriculum Vitae / Resume / CV Format with Career Objective, Job Description, Skills & Work Experience for Freshers & Experienced in Word / Doc / Pdf Free Download
Birat Agarwal
6211 Downing St. Lane, Apt 420 · Virginia, RA 30215, USA
Cell: (240) 302-2611 · E-Mail: birata59@yahoo.com

Education
PhD. in Electrical Engineering  – Expected May 2012
­University of North Carolina at Charlotte - Charlotte, NC - ­  GPA: 4.00/4.00

Master of Science in Electrical Engineering – Aug 2008
University of North Carolina at Charlotte – Charlotte, NC –  GPA: 3.72/4.00

Bachelor of Engineering in Electronics – May 2005
University of Mumbai – Mumbai, India –   GPA: 3.5/4.00

Dissertation : The case for a Hardware Filesystem
As secondary storage devices get faster with flash-based solid-state drives and emerging technologies like phase-change memories, operating system overhead becomes prominent. Moreover, with cheap transistors and abundant on-chip cores, a monolithic operating system responsible for managing disk accesses may not scale. My research is focussed on testing out the feasibility of migrating the filesystem into a dedicated hardware core. Towards this end, I have built and integrated FPGA-based cores: a Hardware Filesystem and a Serial ATA disk controller. Preliminary results in terms of run-time performance and resource utilization are encouraging.

Specialities                                                                                                               
High Performance Computing, Storage Systems, Serial I/O, FPGA-based accelerator design, Hardware/Software Co-Design, Computer Architecture

Professional Experience
Los Alamos National Laboratory – Los Alamos,NM         June 2011 – Till Date
Research Intern
·   Implemented a Serial ATA Host Bus Adapter core on a Xilinx Virtex-6 FPGA for high bandwidth disk access.
·   Developed an FPGA-based checkpointing system for HPC applications.
This work has been demonstrated at Supercomputing 2011

Infineon Technologies – Allentown, PA                            May 2010 – Aug 2010
Engineering Intern
·   Pre-Silicon Timing Characterization of Chip IO interfaces: Integrated and customized Characterization tool with Synopsys PrimeTime for Static Timing Analysis and SPICE simulation tool for IO pads. Analyzed timing reports to suggest improvements.
·   Performed RTL Power Estimation on a cell phone chip module using Sequence Power Theater to determine hot spots.

University of North Carolina at Charlotte – Charlotte, NC  Aug 2009 – Dec 2009
Research Assistant
·   Interfaced a custom Hardware Filesystem core with a streaming hardware application (BLAST) on a multi-FPGA system. Verified functionality using Modelsim VHDL testbenches and Chipscope in-circuit debugger.


Journal Publications

Andrew G. Schmidt, Siddhartha Datta, Ashwin Mendon and Ron Sass. “Investigation into Scaling I/O Bound Streaming Applications Productively with an all-FPGA cluster”.  Elsevier Parallel Computing Journal (ParCo), December  2011.

Ashwin Mendon, Andrew G. Schmidt and Ron Sass. "A Hardware Filesystem Implementation with Multi-Disk Support". The International Journal of Reconfigurable Computing, vol. 2009.

Conference Publications

Bin Huang, Andrew G. Schmidt, Ashwin Mendon and Ron Sass. “Investigating Resilient High Performance Reconfigurable Computing with Minimally-Invasive System Monitoring”.  Published in 4th International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA’10). Won the 2010 OpenFPGA best paper award.

Andrew G. Schmidt, Siddhartha Datta, Ashwin Mendon and Ron Sass. “Productively Scaling I/O Bound Streaming Applications with a Cluster of FPGAs”.  Published in 2010  Symposium on Application Accelerators in High-Performance Computing.

Ashwin Mendon and Ron Sass. A Hardware Filesystem Implementation for High-Speed Secondary  Storage. In Reconfig ‘08: Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs- Cancun, December 2008. IEEE Computer Society.

Talks

A Hardware Filesystem for high-speed secondary storage
  • FPGA summer lecture series, Los Alamos National Laboratory            July 2011

Pre-Silicon Characterization
  • Infineon Technologies, Allentown Pensyllvania                                 Aug 2010

Technical Skills
HDLs:  VHDL, Verilog
EDA Tools: Xilinx Platform Studio, Xilinx ISE, Modelsim, Chipscope,  Synopsys  PrimeTime, Mentor Graphics ADK, Sequence PowerTheater
Programming: C, C++, Assembly, Python, PERL, Pthreads, MATLAB
Device Drivers: Proficient at writing Linux Device Drivers
Platforms:  Linux, Sun Solaris, Windows

Honors

Outstanding Graduate Student Award, Electrical and Computer Engineering, UNC Charlotte, 2012



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