Sample Template Example of Beautiful Excellent Professional Curriculum Vitae / Resume / CV Format with Career Objective, Job Description, Skills & Work Experience for Freshers & Experienced in Word / Doc / Pdf Free Download
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Valley , California & Red Lodge, Montana
San Jose , California
Santa Clara , California
Sunnyvale , California
Sunnyvale , California
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Trevord Olson PO Box 1111, Red Lodge , MT 59121
trevor@siliconskygps.com 55°
11.544’N, 144° 15.144’W
cell: 406.670.1234
Career Goal
A senior-level
engineering management position in RF and/or GPS that includes directing a team
of highly-skilled engineers and technologists in product development, system
architecture, system integration and circuit design at a consumer, commercial or
military GPS/wireless developer.
Overview
I am a senior electrical
engineer, entrepreneur and veteran of the Silicon Valley
electronics industry. As president and principal engineer of my own GPS engineering
company for 5 years, I have been responsible for system architecture, hardware
design and project management on numerous GPS and wireless products.
Additionally, I maintain technical oversight of designs and development teams
and business development activities. My clients include NAVSYS—a
government/defense contractor; John Deere–precision GPS farm equipment;
SkyHawke Technologies–the leading GPS-enabled golf rangefinder and other
GPS/wireless innovators.
I have 22 years experience
with circuit-level design, system architecture & integration, project &
team management, budget responsibility, product development, testing and
manufacturing. I have been able to share
a mutual respect with supervisors, colleagues and direct reports. My background and work history uniquely
qualify me to expediently bring products from concept to mass mark et.
My experience
includes wireless communication systems and, extensively, GPS receivers for all
applications—ranging from high-precision geodetic survey, to high-dynamics
missile tracking, to full systems-on-chip (SoC) for the mobile handset mark et. Over the past two decades, I have had lead
roles in development of the GPS hardware used in the iPhone, HP iPAQ
smartphones, TomTom and Hertz NeverLost in-car navigation system, including the
smallest single-chip GPS in the mark etplace,
the Hammerhead II.
Professional Experience
SiliconSky GPS, Inc.
President and
Principal Engineer
July 2006 -
present
GPS and RF design and engineering firm. RF/system architecture, downconversion
receiver design, analog filters,
impedance-matching, A/D conversion, PLLs, AGCs, DC-offset correction loops, GPS
integration, antenna integration, SPICE and MatLab simulation, F/W development,
PCB layout, prototype and test, documentation, project management, team
leadership and business development.
Developed innovative, ultra-low power positioning
devices for military applications.
Developed commercial medical device (asthma inhaler)
integrating AGPS, GSM/GPRS modem and embedded processor for CDC-funded medical
research firm.
Provide ongoing design, engineering, debug and
manufacturing expertise for multiple GPS product lines for Navcom
Technology/John Deere, SkyHawke Technologies and NAVSYS. Includes both independent projects and
collaboration with other design and mfg engineers.
Provided system,
circuit, layout and antenna selection guidance to Centrality Communications
(SiRF) for Smartphone reference design. Developed concept, architecture and
cost/feasibility analysis for avalanche safety product and cattle geo-fencing product.
Global Locate/Broadcom
Senior RF Engineer
August 2003 -
August 2006
Senior engineering
team member responsible for management of RF architecture, specifications and co-development
of industry’s smallest GPS SoC (Hammerhead) with Infineon—flagship product for
Global Locate. Contributed to next generation RFCMOS IC design, simulation and
layout. Developed test and application boards for chip sets developed in-house.
Assisted OEM (Tom Tom, Sharp, IBM, HP) integrations and debug during product
development. System design, including frequency plan design, Gain/Noise Figure analysis,
Matlab simulation of MASH sigma-delta PLL & Phase-Noise Integration. Antenna evaluation/analysis. Wrote white papers:
Effects of Reference Clock Phase Noise on SNR; Impact of Reference Clock AFC on
SNR, Data Decoding & Doppler Frequency Estimation.
Magellan Corporation (Thales Navigation, Inc.,
Ashtech, Inc.)
Senior RF
Engineer/Project Manager
June 1996 –
January 2003
Managed
development of core technology and flagship products: Single- and
dual-frequency precision GPS receivers; Single-board integrated GPS, WAAS and differential
correction radio beacon receiver; 750Kgate, leading-edge, GPS correlator ASIC.
Evaluated RF and
system architectures and implementation. Managed development schedule, budget
and risk-analysis. Interfaced with Marketing department to construct
requirements and specifications documents. Defined and supervised verification
tests and production test strategies. Organized and chaired ISO 9001 design
reviews and lead the ECO process to introduce products into full-scale
manufacturing. Supervised design budgets of over $5M.
Extensive
experience remote-managing developments by the corporation’s engineering team
in Moscow , Russia
Designed
industry’s smallest and first sub-$100 OEM GPS Module for in-car Navigation
(Hertz NeverLost), asset tracking and handheld applications. Coordinated
implementation of high-volume (500kpcs/yr) manufacturing test facility in Osaka , Japan mark ing. Wrote white paper on relationships between
NF, gain and system performance.
Trimble Navigation, Ltd.
RF & Digital
Design Engineer
January 1994 –
June 1996
Designed first GPS
receivers in a type II PCMCIA format; principal designer responsible for
digital and RF design; project definition through product release; strict
space/power constraints, dual down-conversion, IF/BB filter design, Motorola
68330 embedded controller, crystal oscillator, FCC and CE mark ing, design-failure-mode effect analysis
(DFMEA), manufacturing issues, project management responsibilities. Designed
serial-device PCMCIA interface in FPGA.
Diablo Research Corporation/Cadence
RF & Digital
Design Engineer
October 1989 –
December 1993
Engineering
consultancy with emphasis on design for high-volume, low-cost manufacture.
Responsibilities included the design, prototype, test of consumer products.
Projects demonstrate a diverse ability.
Proprietary 900
MHz spread-spectrum packet radio transceiver: for Electronic Price Tag System; also included
a PC/AT-bus card with embedded controller and Xilinx FPGA to implement
redundant communication link; LCD modules with optoelectronic communication
link.
"20-Year
Lightbulb"/RF-induction lighting: power-factor-corrected switching power
supplies; extensive PSpice simulation and Monte Carlo analysis; MTBF analysis;
FCC/UL; designed and implemented automated test facility to measure and record
lumen output and efficiency; Peltier (thermoelectric) modules. Designed and
built RFI screen room.
High efficiency
DC-DC converters, requiring wide input range, adjustable output voltage, and
high battery utilization.
Technical Skills
- Laboratory experience with network
analyzers, RF spectrum analyzers, analog/digitizing oscilloscopes,
antennas, noise figure meter, signal generator, temperature chambers,
antenna chambers, emulators, logic analyzers, spectroradiometer, soldering,
other lab equipment.
- Experienced with MatLab, PSpice,
Touchstone, Virtuoso, Eagle, PCAD, OrCad, MathCAD, some LabView.
- Product and project management
expertise and roadmap definition.
- Working knowledge of programming: C,
BASIC, Assembly languages.
Education/Awards
- BSEE,
- Besser
Short-Course Certifications: Antennas
& Propagation for Wireless Communication, Wireless Digital
Communications, RF System Design, RF CMOS Design, Digital Frequency
Synthesis, RF and Analog Fundamentals.
- "40
Under 40" Award for technical business innovation,
- Cadence
trained on Virtuoso IC design tools: ADE, Spectre, Spectre RF, and Layout
Editor. 2005.
- Program
Management Training certification,
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