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Joy Joseph
309 Rome
Court 610-366-9876
Home
Orefield,
PA 18001 610-393-1230
Cell
Joy.joseph@verizon.net Email
Background Summary
·
15 years of application
experience in power management and voice/data access communication markets. 4
years in applications for dc/dc converters, ac/dc converters, LED drivers,
Li-Ion battery chargers, and portable power management chipset including chip
performance analysis, chip verification, board circuit design and layout,
circuit simulation, and customer support.
·
5 years Marketing experience
and marketing support including analyzing customer opportunities, design win
tracking, revenue analysis, customer visits, and product development for new
and existing markets.
·
Managerial experience on power
management and telcom application teams responsible for chip architecture,
evaluation board development, and customer support.
·
Well versed in programming
languages including C, C++, Basic, TCL-TK, and Assembly Language.
·
10 years of analog and digital
circuit design and development of semiconductors.
·
U.S. patent 5,360,979 for
circuit techniques applied to a high voltage, high speed solid state relay.
Skills
·
Possess application and design
knowledge of power management devices, analog and digital circuits, digital
transmission techniques, high speed backplanes, SERDES, Quality of Service
techniques, Ethernet, IP networking protocols, and Network Attached Storage,
SIP and VoIP communication protocols.
·
Experience across all phases of
product development from first customer marketing engagements, system and
architecture development, circuit design/debug/test, introduction to
manufacture test, and user documentation.
·
FPGA and VHDL experience on
evaluation and prototype boards as well as schematic capture and board layout.
·
Excellent debug skills.
·
Excellent oral and written
communication skills.
·
Prolific writer authoring many
datasheets, application notes, user guides, and training material.
Experience
Monolithic Power Systems, San Jose,
California 2010 to 2012
Senior Field Applications Engineer
·
Supporting customers using MPS
power management parts including dc/dc converters, ac/dc converters, LED
drivers, LDOs, USB current limit switches, Li-Ion battery chargers, and
operational amplifiers.
·
Participated in customer
visits, circuit design and simulation, circuit evaluation and debugging,
schematic and layout reviews.
·
Experience with Simplis power
management simulator to design dc/dc buck, ac/dc flyback, ac/dc LED driver, and
dc/dc inverting buck-boost circuits for customers.
·
Architect for several new power
supply chips including half-bridge driver and custom ac/dc Li-Ion battery
charger.
·
Territory included northeast
North America. Grew revenue from 0 to $5 million per year.
Amplifier Research,
Souderton, Pennsylvania 2008
to Present
Product Line Applications Specialist
·
Supporting RF conducted
immunity (CI) test systems and automotive transient generator systems.
·
Experience includes test and
evaluation of CI and transient generator systems, customer support, customer
visits, and trade show participation.
Agere/LSI, Allentown,
Pennsylvania 2001
to 2008
Marketing Manager/Technical Manager /Distinguished MTS
·
Applications manager for power
management devices targeted for handheld applications. Experience included
customer visits, product marketing, writing datasheet, application note, board
user guide, FAE/customer training, chip validation, evaluation board design
with schematic capture using ORCAD, tested/debugged boards. Worked with layout
engineer to optimize sensitive routing. Evaluated performance and
characteristics of Buck, Boost, and auto-Buck-Boost switching converters, LDO
linear supplies, and USB battery chargers.
·
Promoted to technical manager
of a cell switching fabric application group. Group supported 3 generations of
packet-switched fabric chip sets, as well as backplane drivers for all fabric
devices. Total revenue exceeded $20 million per year.
·
Circuit and board designer for
power management and power distribution for a satellite radio chip evaluation
platform including architecture, schematic capture, component selection,
layout, debug, and evaluation.
·
Marketing manager for power
management devices. Experience included product marketing, customer visits, and
FAE/customer training. Revenue estimated to be $2 to $5 million per year.
Lucent Technologies, Allentown,
Pennsylvania 1993 to 2001
Member of Technical
Staff (MTS)
·
Architect for a family of
backplane FPGA + SERDES devices for packet-switched fabrics. Included all
architectures, overseeing the VHDL development and software development with
contracted companies, and technical support including lengthy international
customer visits for LG in Korea and Nokia in Europe.
·
Assisted Asian and European
customers on-site to solve chip issues on packet based transmission boards.
·
Started and maintained customer
documentation website for over 50 customers.
·
Wrote C-language application
layer software for a HDTV demonstration platform. Participated in the National
Association of Broadcasters (NAB) 1998 trade show providing demonstrations and
customer visits.
·
Application engineer for
broadband access RF ICs including writing data sheets, applications notes, IC
definition and evaluation, customer visits, marketing, FPGA and board design,
and trade show participation. Included writing C-language programs to provide a
test environment for the entire chipset, and supporting LGIC in Korea with the
system.
·
Front line technical product
support applications engineer for the entire Telecom group including customer
interaction for technical inquiries, coordinating data sheets, writing
application notes, technical and marketing visits with customers, and trade
show participation.
 |
AT&T
Bell Laboratories; Reading, Pennsylvania 1984
to 1993
Member Technical Staff
·
Circuit designer for a family
of optically coupled High Voltage Solid State Relays (SSR), receiving U.S.
patent 5,360,979 for circuit techniques applied to the high speed SSR.
·
Design of transformerless Data
Access Arrangement (DAA) for modem applications including circuit architecture,
circuit design, and customer visits.
·
Developer of an ISDN dc
termination IC. Interfaced with customers in USA and the Netherlands. Tasks
include circuit design, circuit evaluation, project management, and define
electrical and test specifications.
Bell
Laboratories; Whippany, New Jersey 1981 to 1984
Senior Technical Associate
·
Development of software user
interface of a facility terminal test. Developed flow diagrams, C- and assembly
language for the menu driven user interface.
·
Product design engineer for
dual line unit including device costing, board layout, datasheet.
·
Tested line amplifiers for
compliance to functional criteria for central office telecommunication
equipment.
Education
·
Master of Science in Electrical Engineering
Lehigh
University, Bethlehem, Pennsylvania
·
Bachelor of Science in Electrical Engineering Technology
Pennsylvania State University,
Harrisburg, Pennsylvania
Awards
·
U.S. Patent. (5,360,979) Fast Turn-off of Solid State Switches
·
Various AT&T/Lucent/Agere/LSI Worldwide OEM Team and personal
awards
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