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Sarath Zewde
152 Inwood Drive,
Rome, New York home: (810) 279 3025
PROFILE
A highly motivated engineer, skilled in embedded
real-time software design/development and successful in investigating and
solving problems. A fast learner, able to apply engineering skills to a wide
range of projects.
TECHNICAL EXPERTISE
Languages: ASM
(MIPS, ARM, StrongARM, PowerPC, SPARCv9, x86, x64/AMD64), C, C++, Visual Basic,
Java.
RTOS: VxWorks,
QNX, LynxOS, MontaVista Linux, uClinux.
OS: Linux
(2.2, 2.4, 2.6), Windows (NT/2000/SVR2003/XP/Vista), UNIX (Solaris6 to
Solaris10).
Boot Loader: RedBoot, U-Boot, CFE (Broadcom)
Protocols: Ethernet,
PPP, TCP/IP.
Bus Protocols: xScale, PCI/PCI-X, PowerPC 60x, CoreNet, MMC/SD/SDIO,
I2C, SPI.
Cache Protocols: MESI, MESI+L.
ABIs: System
V (SPARCv9, PowerPC, ARM, MIPS), x86, x64 (AMD64).
HDLs: SysVerilog,
Verilog.
FPGA: Xilinx,
Altera(NIOS II Soft Processor).
Interests: Embedded
Real-Time Systems, device drivers, OOD, RT UML, Kernel programming, Win32
programming, Boot Loaders.
Lab Tools: Oscilloscope,
Logic Analyzer, JTAG debugger/programmer.
Version Control: CVS, SVN, Git, Clear Case.
WORK EXPERIENCE
Inwood Drive, Rome, New York 12.11 - present
SW Engineer
Ø Marvel 88E6165 Layer 2 Switch drivers, for Nios II and
ThreadX.
Ø FPGA firmware on-field-upgrade, development.
Ø De-jittering of the GPS signal, use for frame
alignment.
Ø Trimble chip (GPS) control application development for NMEA
messages.
Ø The development was done in C, on Altera Nios GNU-based
tools. The SW platform was Altera's HAL OS, and ThreadX (ARM). The HW platform
was a Design Art Networks 3-core
ARM-based design, and Altera FPGA.
QNX Software Systems, Rome, New York 10.10 – 11.11
SW Engineer
Ø LED
device driver development for the RIM's PlayBook device.
Ø Ambient
Light Sensor device driver development for the RIM's PlayBook device.
Ø SYS_CLK
drift corrector development for the RIM's PlayBook device.
Ø Low Power DDR thermal sensor device driver development.
Ø Multi-core,
Inter-process shared memory lock library implementation.
Ø Board
bring-up for the TI's OMAP5430 SoC, on the TI's Innovator (simulator) tool.
Ø The
development was done in C and ARM assembly using GNU tools. The SW platform was
QNX's Neutrino OS. The HW platform was a Texas Instruments ARM(Cortex)-based
design.
Broadcom Corporation, Montreal, Quebec 05.09 – 06.10
Principal SW Engineer
Ø Boot
Loader development and enhancements. Boot Loader porting to new chip designs:
Broadcom's BlueRay and Digital TV solutions. The MIPS cores used were MIPS
24K/f and BRCM MIPS 4380.
Ø Design/implementation/testing
of a device driver for a UART-DMA embedded host controller.
Ø UART-DMA
block verification and bring-up.
Ø Design/implementation/testing
of a device driver for a MMC/SD/SDIO embedded host controller.
Ø MMC/SD/SDIO
and Interrupt Controller blocks verification and bring-up.
Ø SDIO
Linux stack (kernel) porting/modifications to support Broadcom's implementation
of the MMC/SD/SDIO standards.
Ø The
development was done in C and MIPS assembly using GNU tools. The SW platform
was Embedded uClinux, 2.6.28.
Freescale Semiconductor, Ottawa, Ontario 02.08 – 03.09
SW/HW Co-Simulation Prime
Ø Supported
the p4080 ROCOO (Random On-Chip Object-Oriented testing methodology)
environment. Took ownership of the CoreNet BFM/ROCOO testbench. Supported and
enhanced the testbench (SysVerilog), acted as a reference for existing
functionality, was the first to test new RTL drops.
Ø Developed
tests (stimuli), to be run in the simulator (VCS) in order to test new-added
features, and verify the integrity of previous releases.
Ø The
development was done using C/ASM/SystemC/SystemVerilog. The GNU/VCS tools were
used to make simulation modules. The simulation environment provided with logs
and wave files (.vpd/.fsdb), for interpretation of the transactions resulted on
the interconnect.
Ø Developed
boot loader code (U-Boot) for the PAMU (Peripheral Access Management Unit)
block, a IOMMU enabling the p4080’s hardware virtualization features. Debugged
and provided solutions for the address translation mechanism and the operation
translation mappings, which were features of the PAMU block. Developed Ethernet
and OPIC drivers for the p4080’s boot loader.
Ø Developed
verification code (kernel modules) for the p4080 model (cycle accurate Simics
models), running on a Linux 2.6, SMP compiled. It was a SMP-oriented kernel
module, scalable, using a producer/consumer thread scheme. The threads could
bounce between cores, or be bound to a particular core. All together it
provided with maximum stress for the datapath acceleration hardware and was
useful to detect simulation model and software, issues.
Ø The
development was done in C and e500mc assembly using GNU tools.
BTI Systems, Ottawa, Ontario 01.08 – 02.08
Software Engineer
Ø Driver development for the BTI’s 10-port
GBE(Gbit Ethernet) Muxponder, on the client side.
Ø The 10-port GBE Muxponder provided high
interface density for multiplexing a wide range of protocols (GE, OC-48,
STM-16, Fiber Channel, FICON) onto a protected 10Gbps wavelength.
It was used for SONET/SDH Aggregation &
Interconnect, Data Center Storage Extension, Multi Service Ring Solutions,
Transparent Network Interconnect.
Ø The embedded development was done using
C/ASM, on a QNX Momentics 6.3.2 IDE. The GNU/Eclipse tools were used to make
driver modules. The target was an embedded PowerPC (MPC 8275) processor.
Trigence Corporation, Ottawa, Ontario 04.06 – 01.08
Kernel Engineer
Ø Kernel System Calls intercepts and library
(user mode) code optimization.
Ø The development was done using C and
assembly, on lab test machines (Solaris9, Solaris10, Linux RH9, RHE3. RHE4,
SUSE10, Windows NT to Vista). The GNU tools were used to make kernel modules
and user mode libraries on Linux/Solaris. On Windows, the MS toolchain
(CL/NMAKE/MASM/ML64) from the PSDK/WINDDK was used.
Ø The intercept code was carefully designed
and implemented to add minimum overhead to the native system calls’ processing.
System call interception in user mode was achieved by on-the-fly modification
(code overwrite) of the application’s libraries (binary op-code injections to
replace the original trap/sw interrupt op-codes).
Ø Reverse engineered Windows system libraries
(ntdll.dll), and developed library intercept/code plant.
Ø Ported from Win32 (x86) to Win64 (AMD64).
Developed the architecture-specific assembly-level AMD64 modules.
Ø Debugged and fixed customer issues in the
Ottawa lab.
Soma Networks, Ottawa, Ontario 12.04 – 04.06
Linux Driver Specialist
Ø Driver development for the Soma’s Macro
Base Station.
Ø The embedded development was done using C,
on a 2.4 Linux Kernel. The GNU tools were used to make kernel modules. The
target was an embedded x86 platform.
Ø Board bring-up of a new SoC (FPGA-emulated
in the pre-silicon verification phase). The ASIC comprised an ARM926E
processor, a ZSP500 DSP, and various AMBA peripherals (DMA, memory, interrupt,
UART, Ethernet, GPIO, etc.). Developed drivers for ARM-targeted boot loader
(U-Boot).
Ø Produced diagnostic code for the different
components of the ASIC – memory content verification, AMBA bus transactions,
interrupt signaling. Used Logic Analyzers to provide with means for wave
(signal activity) capturing and debugging.
Critical Telecom Corporation, Ottawa, Ontario 06.04 – 12.04
Embedded Software Engineer
Ø Driver development for the Marvell’s
Gigabit Ethernet Switch 88E6183, Marvell’s Gigabit Transceiver 88E1111, Gigabit
Transceiver AM79C874 and the PPC405EP’s Ethernet MAC, for embedded Linux
(MontaVista) platform. Driver code integration with the Level7’s Layer2 –
Layer3 protocol SW suite. Linux Kernel modifications to suit Critical Telecom’s
GEmini™ product needs.
Ø The embedded development was done using
PPC405EP assembly and C. The GNU set of tools was used on i686 machines, to
make (ELF format) kernel module.
Ø For debugging, GNU DDD tools were used in
conjunction with Logic Analyzers and Oscilloscopes.
Ø Assisted the Architects, FPGA and Hardware
Designers with diagnostic/debug code.
Tundra Semiconductor Corporation, Ottawa, Ontario 07.02
– 06.04
Embedded Software Engineer
Ø Driver development for the Gigabit
Ethernet, UART and MPIC blocks of the StrongPac companion chip (ASIC), on
VxWorks and RedBoot boot loader. Completed the full development cycle of the
device driver: Participated in Design Specifications, Design, Implementation,
Platform Emulation (Pre-Silicon ASIC Verification) testing and Silicon
Validation testing.
Ø The design of the drivers allowed for easy
porting from the initial development platform (RedBoot boot loader), to any
other commercial embedded RTOS.
The GigE driver serviced a dual-port embedded Ethernet
block. The driver user could chose between a 10/100/1000Mbs, full or
half-duplex configuration, by means of an initialization data file. The GigE
used exclusively a DMA mechanism for data transfer between its RX/TX FIFOs and
system SDRAM buffers, and the driver insured data cache synchronization with
system SDRAM.
The UART driver serviced a dual-port embedded UART
block. The MPIC driver serviced a programmable interrupt controller block. It
supported 4 external microprocessors and 32 input sources.
Ø The embedded development was done using
XScale assembly and C. The GNU set of tools was used on i686 machines, to make
downloadable (ELF format) images.
Ø For debugging, ATI’s ICE CodeLab tools were
used in conjunction with HP Logic Analyzers. Xilinx’s Impact tools were used to
download the RTL code into the emulation platform’s FPGAs.
Ø In the ASIC Verification phase, waves would
be captured on Logic Analyzers (xScale transactions, PCI/X transactions, etc),
to assist with debugging.
Ø Silicon (ASIC) Validation test development
for the Tsi310 chip. The test suite for the Tsi310 chip, were developed around
a set of APIs provided by the Agilent Technologies 2929A/B Exerciser/Analyzer
cards. The Agilent Exerciser cards were able to fully emulate the behavior of
standard PCI\X devices on a bus. In addition, they supplied with Logic Analyzer
capabilities, for cards residing on both of the bridge’s interfaces. Waves
reflecting the ASIC (PCI/X) bus activity would be collected and compared with
the (PCI/X) standards.
Silicon Network Access, Ottawa, Ontario 02.01
– 06.02
Network Software Engineer
Ø Embedded driver development for the iFlow
family of network processors (NPU).
Ø Completed the full development cycle of the
iPP (Packet Processor) device driver. The development phases included
Requirement Specifications, Design, Implementation, Documentation (Design
Specifications, User Programmer’s Guide, etc), Testing and Support.
Ø The design of the driver insulated the
platform-independent functionality from the platform-specific one. This was
achieved by means of implementing an OSAM (Operating System Abstraction Module)
for each (RT)OS supported by the iPP driver – VxWorks, LynxOS, Linux, and UNIX.
One particularity of the iPP driver was being a PCI
(PCI memory-mapped registers), and Network Interface (NI) device meanwhile. As
a consequence, the design and implementation were presented with the challenge
to make the two driver models coexist together. Moreover, the requirements
specified for the iPP driver to support multiple devices, each device having
multiple NIs.
Ø The architecture of the iPP device allowed
the use of a DMA mechanism for fast packet data transfer between the iPP device
and Control Plane Processor (CPP).
Consequently, the iPP driver had to handle DMA data buffer allocation,
virtual-to-bus/bus-to-virtual address translation, data cache synchronization,
specific to each supported platform.
Ø The embedded development was done using
C/C++. The GNU, Linux and the LynuxWorks set of tools were used on PPC750,
i686, SPARC machines.
Ø During the pre-silicon verification, the
chipset logic would be loaded onto an FPGA-based platform, waves would be
captured (DMA, PCI, other buses, etc) and looked for S/W or logic errors.
Ø Participated in the Design sessions for the
HW-SW interfacing.
SRTelecom, Kanata, Ontario 05.00
– 02.01
Embedded Software Engineer
Ø Designed and developed the Network
Management Agent (NMA) and Management Information Base (MIB), for the WL304
Wireless Loop project. The SRTelecom’s WL304 Wireless Loop offered a wireless
access solution to the last mile of the local loop.
Ø Designed and implemented the communication
link between the SCC driver residing in the Ethernet card and the radio cards
responsible for forwarding the IP packets to the IP wireless terminal.
Ø The embedded development was done using RT
UML/C++. The GNU cross-compiler, Wind River’s Tornado platform and EST
VisionClick toolset were used to make, download, program the flash memory, and
debug the system.
Ø The environment consisted of PC's/WinNT
(host) and Motorola MPC860 (target).
Canadian Payments Association, Ottawa, Ontario 09.98
– 05.00
Programmer/Analyst
Ø Responsible for the development (design,
implementation, building, testing and Customer Support) of the Large Value
Transfer System (LVTS) project. The LVTS was the mechanism whereby
participating members (Financial Institutions) electronically exchanged items
of significant value among themselves.
Ø Developed the LVTS’s GUI using Visual C++,
Visual Basic, and COM/ActiveX Components.
Ø Modified the application’s features
according to the customer’s specifications.
Ø Implemented the security features of the
real-time messaging system, using the Entrust API Toolkit for the
encrypting/decrypting process and IBM MQSeries API Toolkit.
Ø Provided technical support for users.
Ø The environment consisted of PC's/ WinNT.
Belgian Thermal Treatment, Brussels, Belgium 09.92
- 04.96
Software Engineer
Responsibilities:
Ø Designed, developed and tested real-time
software for thermal process control.
Ø The work consisted in developing
mission-critical code for creation, execution and termination of
oven-controlling processes, communication and synchronization between
processes, communication with the environment, and process administration.
Ø The development platform consisted of Sun
UNIX/C.
Ø Created a data base system to manage
Quality Control using C++, Visual Basic, MS Access.
Ø Participated to the implementation of the
ISO 9002 System.
IZOMAC, Turda, Romania 09.90
- 01.92
Software Engineer
Responsibilities:
Ø Developed real-time programs for
controlling of thermal equipment.
Ø Designed, implemented and tested library
routines (hard real-time queuing mechanisms) used by dispatch processes.
Ø The work consisted also in SW/HW
integration and support for customer acceptance of the controlling software.
Ø The environment consisted of HP UNIX/C.
Technical College, Turda, Romania 09.90
- 01.92
Mathematics Department
Mathematics Professor (evenings).
EDUCATION
Masters in Mechanical Engineering, University of
Cluj-Napoca, Romania 1985
- 1990
LANGUAGES
English, French, Spanish and Italian.
SECURITY CLEARANCE
Enhanced Reliability.
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