Software Controller Sample Resume Format in Word Free Download

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SENIOR SOFTWARE ENGINEER

Harprit Robinshon                                                                                                                                                              

710 Autumn Harvest DR, Unit 212                                                                                                                    Cell:     386-295-7021

Friendswood, SA 20125                                                                                                                                    harprit_r55@gmail.com

COMPUTER LANGUAGES: C, Ada95, ASSEMBLY, BASIC, DOORS, FORTRAN

INTEL MICROPROCESSORS: 8008, 8031, 8044, 8051, 8080, X86 series, IXP 2400, IXP 2800

OTHER MICROPROCESSORS: ARM, MOTOROLA and FREESCALE MC 68000, Power PC 750 series, TI 73510 series, MIPS, MIPS 16

COMMUNICATIONS PROTOCOLS: ADSI, ATM, ARINC 429, BLUETOOTH, IEEE 1284 PARALLEL, IBM SDLC, IEEE 488,  ISDN (LAPB, LAPD), MIL-STD-1553B, POS-PHY 2, 3, SCSI, SPI-4, UTOPIA 2, 3, TCP/IP.

MILITARY/DOD/FAA/ISO STANDARDS: 1553B, 1589C, 1750A, 1815A, 2167A, ARINC 429, DO 178B

IN CIRCUIT EMULATORS: APPLIED MICROSYSTEMS 80186, 68000, Power PC, HP 64700 SERIES (80186, 80960), INTEL 8044, 8051, 8080, 8085, 8086, I2ICE, NOHAU 8044, 8051, GREEN HILLS MULTI for COLDFIRE.

REAL TIME OPERATING SYSTEMS: UNIX, TORNADO vxWorks, Wind River Platform for Safety Critical ARINC 653, VxWorks 6.5, 6.7, Eclipse

RECENT EMPLOYMENT RECORD

May 2011 to present:  Under contract to CURTISS WRIGHTCONTROLS, Embedded Computing, San Diego, CA.  Individually responsible for vxWorks V6.7 POD software controller for Boeing P8 aircraft.  Was assigned the project with only a preliminary SRS and had to design software, write the SDD, prepare slides and partially present the CDR.  The software used the Curtiss Wright VPX3-127 CPU card and controlled multiple digital I/O, analog input and a Resolver Synchro-To-Digital card.  The software was written in C using vxWorks 6.7operating system.  The final product was for ATP production.

Feb 2010 to Feb 2011:  Under contract to VEROCEL, Westford, MA.  Verocel is a software validation firm that validates software for various aircraft manufactures.  They have a tool called VeroTrace which they designed to facilitate verification.  It is their answer to DOORS for the linking of requirements to tests.  It produces reports for DO178B and allows the user to generate various reports.  I was responsible for the design and verification of tests for the P8 aircraft TCP/IP stack written in C and Ada 95.  The continuing assignments are for the design and testing C-130J and C-130 AMP for GE Aerospace.

Sep 2008 to January 2010:  Under contract to GOODRICH, Vergennes, VT.  I Designed and developed a Software test and a software Test Plan in C and ADA 95 for an the Airbus tanker Fuel Quality Processing System and fuel dispensing system.  The system consists of multiple sensors of different types for each tank on the aircraft.  There are also multiple pumps on the air tanker.  There are 5 remote sensor units that process multiple sensors and communicate to the main processing unit through the CAN bus.  This is a formal document for the DO178B requirement using DOORS to check requirements with other documents.

Mar 2008 to Aug 2008:  Under contract to HONEYWELL AEROSPACE, Phoenix, AZ.  Member of a two man software team in the hardware test department.  The project was for the Boeing 747 flight control computer which was being retrofitted with 787 hardware.  The computer required a new CPU card since the bus was different.  I was involved in the redesign and modification of hardware diagnostics for new hardware. 

Aug 2007 to Feb 2008:  Under contract to CURTISS WRIGHT CONTROLS, Leesburg, VA.  Contributing team member of software engineers bringing up the Champ board.  My duties entailed the configuration and initialization of the vxWorks BSP for the microprocessor chip written in C.  The microprocessor had two Power PC cores, PCIe, Ethernet and Serial I/O all on chip.  It externally interfaced to gigabit and PCIe switches as well as the VME bus.

May 2007 to July 2007.  Under contract to GENERAL DYNAMICS, Scottsdale, AZ.  Contributing member in a team of senior software engineers working on the next generation GPS satellite GPS III.  The work was in the research and development phase of the project so my involvement included exploring the risk reduction of utilizing a new chip, the PLX 9060.  This new driver I wrote was written in C.  This involved bringing up a prototype board with the Motorola Coldfire processor under the Green Hills micro velocity operating system.  The reason for my research for the risk reduction,  was that the PLX 9060 was never used before in a General Dynamics satellite prior to my assignment.

February 2007 to April 2007.  Under contract to HAMILTON SUNDSTRAND, Rockford, IL.  I was hired to write a 16 bit CRC according to ARINC 665-3 download standard.  In addition there was a RAM test and various software modifications to the download program.  This was a general program but specifically for the Boeing 787. 

May 2006 to January 2007:  Under contract to L3 TITAN, Panama City Beach, FL.  As a major contributing team member of software engineers, my task was to perform redesign and modification of the control software for the US Navy LCAC (Landing Craft Air Cushion) hovercraft.  The main control program I worked with used vxWorks on a power PC, all written in C. The control software communicated to the other systems on the boat via various serial protocols (RS422, RS485 etc).  I was tasked on the CAMS (Communication and Alarm System) software.  The modifications I designed were necessary because multiple boards were no longer available due to end of life supply problems.  In addition there were hardware modifications necessary for a version of the boat for the Korean navy.

May 2003 to May 2006:  Under contract to SMITHS AEROSPACE, Grand Rapids, MI.  Team member involved in developing the SCOE (Software Common Operating Environment) vxWorks ARINC 653 platform, which is certifiable to RTCA/DO-178B Level A.  My specific assignment was for the physical Ethernet driver for the Galileo GT64260 written in C and also the testing of the new TCP/IP Ada interface.  After my initial task an additional assignment was assigned for the inter board DMA communication on the VME bus using the Tundra bus interface chip.  In addition, I brought up a vxWorks BSP (Motorola MPC 8265 processor) and an AFDX driver.  AFDX is an Ethernet based protocol used on aircraft.

December 2002 to May 2003:  Under contract to SENSITRON, San Mateo, CA.  One of 2 software engineers developing software for the SPAM (Sensitron Personality Access Module).  The SPAM interfaces to various medical sensors, such as a blood pressure meter, using an RS232 interface.  The SPAM communicates with the PCU (Patient Control Unit) via both Bluetooth and IrDA (Infrared) interfaces.  The CPU is an ATMEL EB40A which contains an ARM core.  My assignment was in the generation of the ARM GNU tools and the eCos operating system.  The eCos operating system is a free OS from Red Hat (a subset of Linux) and contains all the source code in C and C++.

July 2002 to November 2002:  Under contract to APPLIED MATERIALS, ETEC DIVISION, Hayward CA.  Team contributor working on the GE II Rasterizer Engine.  My initial assignment was design and test work in the vxWorks boot and all the real time system functions for a Motorola PRPMC800 CPU board (Power PC) and a SBS Technologies gigabit ethernet (INTEL 82543) board;  Both boards are PMC and plug into ETEK’s board. 

August 2001 to June 2002:  Under contract to INTEL CORPORATION,  NPG Validation Engineering Group, Hillsboro, OR.  Member of the vailidation team performing post-silicon validation for both the IXP 2400 (Sausalito) and IXP 2800 (Castine) network processors.  I was involved of writing microcode for the MSF (Media Switch Fabric) area of the network processor.  The work also consisted of testing of all the protocols: CSIX, SPI-4 (IXP 2800) and UTOPIA 2, 3, POS-PHY 2, 3 and CSIX (IXP 2400). 

January 2000 to July 2001:  Employed by CORONA NETWORKS, Milpitas, CA.  Responsible for the design and test of  multiple vxWorks boot ROMS for their communications product.  The project included the vxWorks version 2 SENS driver for the INTEL 82559 ethernet chip.  The microprocessor we used was the Motorola Power PC 750.  I worked in tandem with the hardware engineers on the board bring up for two Power PC 750 microprocessors on the same bus.  An additional assignment given to me involved design work with 5 Galileo GT64130 PCI bus controllers on the same bus sharing the same PCI address space. 

January 2001 to February 2001:  Under contract to MIPS, Mountain View, CA.  Wrote diagnostics for the MIPS 16 microprocessor design.  I was hired in to help with the SAVE and RESTORE instructions in both the 16 bit and extended state.  All of the tests had to be written in MIPS assembly language.  Registers were filled with values and after the instruction was executed both registers and memory had to be checked for correct execution of the instruction.

September 1999: Under contract to NISHAN SYSTEMS, San Jose, CA.  Was responsible for designing and testing of a vxWorks SENS driver for the INTEL 82557 ethernet chip on the QED RM7000 microprocessor.  The Wind River supplied driver did not work out of the box for a big endian MIPS microprocessor.  Since I had experience with the INTEL 82596, 82556 and the 82558 I was the ideal candidate to debug the 82557 driver.  Once I got the chip to execute the diagnose command, I was able to determine that all the problems turned out to be endian and endian macro related.

March 1999 to December 1999:  Under contract to CISCO SYSTEMS, San Jose, CA.  Diagnostic software engineer in the WANBU (Wide area network business unit).  I wrote diagnostics for CISCO boards using vxWorks on a QED 5271 microprocessor.  I was responsible for the completion of the vxWorks BSP (Board Support Package) secondary cache code and diagnostics for various communication chips (ATLAS, ATMizer, SONET).

January 1999 to August 1999:  Under contract to PRAXON, Campbell, CA.  Praxon makes an 80386 based telephone system.  I was responsible for the new design of the INTEL CELERON based vxWorks BSP boot ROM.  The project used the General Software BIOS generation program to generate a BIOS.  The BIOS then boots the vxWorks boot from the disk and transfers control to it. 

December 1998 to March 1999:  Under contract to TERALOGIC, Mountain View, CA.  Was hired to design and test a vxWorks BSP boot ROM using the QED R5270  microprocessor.  The product was a development system for their proprietary HDTV (High Definition TV) chip.

December 1997 to December 1998:  Under contract to LUCENT TECHNOLOGIES, OCTEL COMMUNICATIONS DIVISION, Milpitas, CA.  A multiple microprocessor voice mail system is being merged into a one processor design.  My assignment was in the porting of the boot ROM test code from all 3 systems to run under the new Pentium system.  The system uses a RADISYS embedded PC.  I had to interface with the BIOS as a BIOS extension, set up INT 19 and take over the system when INT 19 occurred.  I was directly responsible for the generation of the protected mode descriptor tables.  A debugger had to be written so the prototype could be tested without using the emulator.  This included a specific PCI bus diagnostic.  The SCSI diagnostic software driver and diagnostic was then ported to the platform.  The INTEL 82558 10/100 PCI Ethernet controller diagnostic was designed and written.

June 1998 to September 1998:  Under contract to DIGITAL LINK, Sunnyvale, CA.  My assignment is the construction of a boot ROMS and assisting the hardware engineers in the bringing up of the prototype hardware.  The hardware consists of two microprocessors, a MOTOROLA Power PC and a LSI ATMizer which has a MIPS core.  The multiple microprocessors and custom ASICS are all connected over the PCI bus.  The ATMizer uses a Utopia bus to connect to a Digital Link proprietary bus.  The boot ROM is responsible for all POST (Power On Self Test) as well as the downloading of the custom ASICS. 

January 1998 to May 1998:  Under contract to SHORELINE TELEWORKS, Mountain View, CA.  Diagnostic software engineer for the hardware group. The microprocessor was the NEC VR4200 microprocessor.  An existing prototype has no production diagnostics and only limited power up diagnostics.  Began at the power up level in assembly language and created a diagnostic menu a test technician can use.  The order of tests are first RAM using only the registers.  The PCI bus is then checked.  Once the RAM and PCI are checked a boot operating system can be started and the rest of the system checked using C and the VxWorks operating system..

August 1997 to January 1998:  Under contract to LITTON ATD, San Jose, CA.  One of a team  working on the APR-39A(V)2 military radar receiver.  The existing prototype contains three 80C186 microprocessors.  A fourth 80C186 is being added for MIL-STD-1553 communication.  My initial assignment was in the upgrading of the emulators from INTEL I2ICE to both APPLIED MICROSYSTEMS Code-TAP and MICROTEK MICE II.  The new emulators run under the PARADIGM debugger.  The Ada compiler used does not produce INTEL standard OMF.  Wrote a utility system that merged the OMF and other files to produce INTEL standard OMF so the emulators could display the source.  Additional utilities were written in PSL (PARADIGM scripting language) and Ada to display the Ada packages.  My next assignment was in MIL-STD-1553 communications.  Wrote the driver design document and then coded the driver in Ada.

March 1997 to July 1997:  Under contract to CIDCO, Morgan Hill, CA.  One of a team of 2 software engineers working on adding ADSI (Analog Display Services Interface) to the iPhone (internet telephone).  The iPhone is being jointly developed with Infogear  Corporation which has its design facilities in Israel.  The microprocessor used is the National NS32FX161 that contains a National 32000 core and on-chip DSP.  The project involved interfacing with the engineers and travel to Israel.  My specific assignment was in the extension of an existing ADSI simulator for a different project to the iPhone project as well as porting of the ADSI code to the National GNX development system.

March 1995 to March 1997:  Under contract to INTEL CORPORATION, NETWORK PRODUCTS DIVISION, Hillsboro, OR.  One of a team of software and hardware engineers that developed  the Intel NetportExpress PRO print server.  The existing design based on an 80186 microprocessor was upgraded to use an 80386.  Was responsible for 4 major areas of the design.  1) The entire start-up code including self test, the placing of the 80386 into protected mode and the generation of all the protected mode descriptor tables.  2) The design and writing of the Ethernet driver physical level utilizing the INTEL 82596 Local Area Network Component.  The design had to be robust enough to handle “broadcast storms” of packets every 200 us.  3)  The design and writing of the Hewlett Packard MIO printer interface.  4) The design and writing of the IEEE 1284 bi-directional parallel interface.  The interface supports reverse channel communication via software in nibble mode.  When the Intel NetportExpress PRO was upgraded to the NetportExpress PRO/100 I was responsible for all the 100 MB Ethernet drivers utilizing the INTEL 82556 Local Area Network Component which is a Ethernet chip that was never released to the public.

October 1992 to March 1995:  Under contract to GE TRANSPORTATION SYSTEMS DIVISION, Erie, PA.  One of a team of software engineers developing the control software for the GE2000 AC locomotive.  My first assignment was to use all my INTEL experience and upgrade an iRMX II DC locomotive simulator to an iRMX III AC locomotive simulator.  In addition to the simulation modifications I developed a test language, TL/1, which allowed the test engineers to write programs to exercise the locomotive simulator from a high level.  Next was in the modification of the DC control software that I had worked on in 1990, to AC control software.  The software was contained on both INTEL 80186 and 80960 microprocessors.  The software was done in C, PASCAL and assembler on the 80186 and C on the 80960.  The test system used 4 HP64700 series emulators, three 80186 and one 80960.

May 1992 to October 1992:  Under contract to GE AEROSPACE, Simulation and Control Systems Department, Daytona Beach, FL.  One of a team of software engineers working on the Platoon Gunnery Trainer (PGT) for both the M1 and M2 armored vehicles.  The system consists of GE video hardware, a VAX and multiple INTEL 80386 and 80486 CPU cards mounted in a MULTIBUS II.  The VAX and MULTIBUS II communicated over a DR11W link.  My specific assignment was in the system software for the MULTIBUS II that contained both iRMX III and UNIX System V.  I was system manager for UNIX and responsible for the systems generation of the different iRMX systems utilizing the INTEL ICU386 utility program.

March 1992 to May 1992:  Under contract to MOTOROLA CORPORATION, TELEPOINT SYSTEMS DIVISION, Boynton Beach, FL.  Diagnostic software engineer working for the hardware department.  The existing product, the SILVERLINK 2000 portable telephone, interfaces the base station to the telephone company through an analog tip and ring interface.  The new base station utilizes the ISDN interface at the "U" reference point.  The system consists of multiple MOTOROLA MC68302 Integrated Multiprotocol Processors, multiple MOTOROLA MC145472 ISDN U-Interface Transceivers and multiple RF modules communicating over a PCM highway through a crosspoint switch.  My specific assignment is in the diagnostics for initial system test, manufacturing test and field test.

February 1992 to March 1992:  Under contract to CARDION CORPORATION, Woodbury, NY.  One of a team of software and

hardware engineers developing the SAAR-5 radar.  The system contains multiple MOTOROLA 68020 microprocessors.  My specific

assignment was in the Ethernet communications.  The configuration was both the 68020 card and the Ethernet card on the VME bus.  The Ethernet card was manufactured by ELTA and implemented INTEL iNA 960 protocol in ROM.  There was no existing system software so I started from scratch and implemented INTEL MIP (Multibus Interprocessor Protocol) on the VME bus to communicate with the Ethernet card.  My initialization and interrupt code then formed the basis for the operating system.   The chip initialization code was written in assembly language, the remaining code was written in C.

November 1991 to January 1992:  Under contract to DATA GENERAL CORPORATION, Westboro, MA.  The project consisted of the modification of existing system software that monitored a Uninterruptable Power Supply.  The existing software only read one of the status lines and did not shut down the system when the batteries were almost discharged.  Worked with Exide, the battery manufacturer, and implemented a charge/discharge algorithm that correctly computed battery condition and shut down the system when battery power was at 10%.  The code was written in C and debugged with the AOS system debugger.

June 1991 to October 1991:  Under contract to INTEL CORPORATION, Munich, Germany.  One of a team of software engineers

That worked on a high-speed mail sorting system for the US Post Office.  The system consists of multiple INTEL 80386 microprocessors running INTEL distributed iRMX IV on an INTEL MULTIBUS II.  My specific assignment was modification of the iNA 960 communications network interface (INTEL OPENNET).  The software was written in PL/M 386 and debugged with Soft-Scope II.  The development environment was UNIX on an INTEL 520 MBII system.

February 1990 to June 1991:  Under contract to GE TRANSPORTATION SYSTEMS DIVISION, Erie, PA.  One of a team of two

software engineers performing modification to existing software that controls a Diesel Electric Locomotive.  The software is about 15 per cent in HP PASCAL for the 8086, and the remainder is written in HP assembly code.  The program had at least 10 authors and consists of approximately 300,000 lines of poorly documented unstructured code.  My specific assignment was the conversion from a 6 motor locomotive to an 8 motor locomotive.  In addition to adding extensive documentation to the modules that I modified, extremely confusing assembly code was restructured and written in HP PASCAL (the only higher level language available).  The development environment was HP UNIX and HP emulators.

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