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SHOURY MISHRA
E-mail:shourymishra91@gmail.com ~ Mobile:
09876543210
To make a sound position in
organization and work enthusiastically in team to achieve goal of the
organization with devotion and hard work.
Academic
Qualifications
|
Qualification
|
Board/University
|
Year of Passing
|
% of Marks
|
BE (EC)
|
Guru
Ghasidas Vishwavidyalaya (Central University), Bilaspur, C.G.
|
2012
|
65.9
|
HSC
|
C.G.S.E.
|
2008
|
62.6
|
SSC
|
C.G.S.E.
|
2006
|
68.7
|
Certificate and Training |
Certificate
|
Institute
|
Duration
|
JAVA/J2EE
|
Lara Technology, Bangalore
|
4 Months
|
UNIX, AIX
|
Alchemy Solutions, Bangalore
|
1 Month
|
SQL
|
Alchemy Solutions, Bangalore
|
3 Days
|
|
Languages : C, Core Java, SQL.
Database :Oracle 10g.
IDE : Eclipse.
Operating
System : UNIX, AIX, Windows XP/7.
Web
Technologies : HTML, JDBC, Servlets.
Basics of ITIL
Foundation.
Academic Project |
v
FPGA Implementation of BCH Codec.
In this project I have studied the
architecture of BCH code and designed and implemented a BCH codec synthesis
system on FPGA for primitive elements (15,5) using VHDL. The BCH codes form a
large class of powerful random error-correcting cyclic codes capable of
multiple error correction. BCH codes operate over algebraic structures called
finite fields. The BCS (BCH Codec Synthesis) system is a design tool that
automatically generates the VHDL description of a BCH code given the block
length and error correcting ability of code. The VHDL model are written in such
a way they can be synthesized down to gate level & thereby transported to
an FPGA. BCS system generates gate level description of BCH code. Here BCH
codec has implemented on Xilinx Spartan 3E FPGA
using VHDL and simulation and synthesis are done using Xilinx ISE 10.1.
BCH codecs are hardware efficient and generated in a fraction of time.
v
8 bit ALU Design using VHDL.
This project includes the designing of
8 –Bit Arithmetic Logic Unit and simulating its components using VHSIC HDL. An
arithmetic logic unit (ALU) is the part of a computer processor (CPU) that
carries out arithmetic and logic operations on the operands in computer
instruction words. ALU performs operations such as addition, subtraction and
multiplication of integers and bitwise AND, OR, NOT, XOR and other Boolean
operations. This device can accept two numbers of 8 bit data and can perform
logical / arithmetic operation. In general ALU includes storage places for
input operands, the accumulated results and shifted results. The flow of bits
and the operation performed on them in the subunits of ALU is controlled by
gated circuit. The design of ALU is done through Xilinx ISE 10.1, which will
give synthesis report, simulation waveforms for the design.
Strengths
|
Ø
Confidence,
Patience, Punctuality.
Ø
Ability to deal
with risk.
Ø
Improvement
oriented.
Ø Flexible, Reliable & Dependable Hardworker.
Extra Curricular Activities |
Ø
Pioneer Talent
Search Program achieved grade B.
Ø
First position in
Race.
Ø
Second position in
inter school debate competition.
Ø
Participated in
Vikas Prathiba Awards Society National level talent search examination &
got Certificate.
Ø
Participated in
Navbharat painting competition & inter school dance competition & won
Prize and Certificate.
Personal Detail |
Name : Shoury Mishra
DOB : 18-04-1993
Mobile : 09876543210
Address : Lotus
Residency, 28th main, 4th cross, BTM Layout, 2nd
stage, Bangalore- 560076.
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