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Sr. Embedded Software Engineer
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Maya Hunt
P.O. Box 90001
Austin, Texas 78702-0297
Phone: (512) 301-9876
E-mail: maya@redfoxco.com
Summary of
Qualifications:
I have over 20
years of experience in hardware and software development of
complex micro-systems. I have managed
many teams as either Project Manager
or Team Leader. I also have experience in running a small
company of
consulting Engineers. I have given many presentations to upper
management
on Schedules, Costs, Problems, ROI, and
moratoriums. I have managed many Project
Teams where the team make-up consisted of Hardware, Software, Quality Control, Manufacturing, Sustaining, Electro-Optic,
and Electromechanical Engineers. I'm an expert on X86 architecture and I have
worked on other microprocessors such as 8051(Product
Engineer), 8052, 8044(Princeton Architecture), 6800, 65C11 along with other manufacturer's chips such as
Micro-Chip. I have worked with most of modern Oscilloscopes, Logic Analyzers,
and In-Circuit Debuggers.
Capabilities:
Architectures: X86 (Intel &
AMD including multi-core), 8051, 8044, 6800, 65C11,
& others.
Hardware Equipment: Hyper Transport
Bus Analyzer, PCI Analyzers, Logic
Analyzers,
Oscilloscopes, DVMs, In-Circuit Target &
Debugger Probes.
System Hardware Architectures: Hyper Transport
Bus, PCI, PCI-X, PCIe, AGP,
and most other motherboard interfaces.
Operating Systems: Windows, Linux, Unix, DOS
Programming
Capabilities: C/C++/C#, Perl, Assembly,
Visual Basic, & SQL
Software
Tools: Visual Studio, Watco C Compiler,
Microsoft Assm
Version
Control: PVCS, VSS
Defect Tracking: PVCS, Teamtrack
EDUCATION:
Post Graduate Studies
Joint
Center for Graduate Studies, Washington
State University, Richland, Washington
35
Quarter Hrs.
Emphasis
on High Speed Digital Electronics, Microprocessors, and Solid State Physics
Bachelors Degree, Electrical & Computer
Engineering (B.S.E. & C.E.)
Oregon
State University, Corvallis, Oregon
244
Quarter Hrs.
Emphasis
on Solid State Physics & Electronics
Most Recent Courses:
Mindshare Courses:
HyperTransport,
APIC, PCI-Express, and DRAM
Portland Community College: C++,
Perl
Experience:
Self-Consultant, Developing Sr.
Engineering Skills
Austin, TX, 07/08 to Present
Pursuing
Consultant jobs and developing Sr. Engineering Skills. Attended PMP Boot Camp to
further increase
knowledge of Project Management, attended several Webinars on various
subjects, latest
being Microsoft's Sliver Light Software for fast embedding of Web applications.
Self taught
Visual C#, XAML, ADO.NET, .Net3.5,
Visual Studio 2008.
Advanced Micro Devices (AMD) Sr. Systems Development Engineer
Austin, TX, 07/06
to 07/08
Responsible to improve the quality and
reliability of AMD's CPUs. As a
Senior Debug Engineer, this was accomplished by debugging customer's and
reference platforms (Desk Top, Laptops, & Servers) down to the 'root
cause' of problems discovered while testing. This allowed AMD to isolate the cause, as
being the CPU's problem, or a chip set problem.
I lead the team that drove chip set problems back to their respective
vendors such as nVidia, Sis, ALI, Via, Broadcom, & ATI. Reported problems were reproduced, verified,
and then debugged down to 'root cause'.
The cause could be software problems (operating systems and/or driver
problems), hardware problems (voltage glitches, timing or jitter), protocol
violations, 3rd party driver problems, margining problems (voltage,
temperature, and/or frequency), or power supply problems (DC to DC switching,
linear regulators, power up timing and/or power down timing problems).
I was responsible for Microsoft
re-writing their Windows Operating system to take care of a problem, where
multiple interrupts on a multi-core CPU using the same PCI Bus, would cause
data overflow and underflow. I also
found Texas Instrument's PCI Bridge had a protocol error (hardware), where the
Bridge did not 'terminate' PCI Bus transactions properly and left the board
hung. As a Senior Engineer, I mentored 2
junior Engineers.
The Red Fox
Co. Chief Executive Officer (CEO)
Beaverton, OR,
03/90 to 06/06
The Red Fox Co. was a small company of
Engineering Consultants (up to 25). I
ran the day to day operations and managed the company. I was responsible for hiring, firing, and
paying the employees. My employees were
drug screened. I also evaluated
employee's performance. I implemented
Quality Control for the company by talking to Clients and asking about the
quality of work being performed by The Red Fox Co. A partial list of clients for The Red Fox Co.
included Intel, Radisys, nCube, Fujitsu, and NEC. Besides the managing the company, I was
responsible for bidding on different projects from various companies.
I was also a consultant, and worked for
various clients, doing a wide range of services. Some of them are listed below:
Net
Test (Client)– Senior Product Engineer/Manager – Beaverton, OR.
Started Net Test's 1st Product
Engineering Group. The company made
elctro-optic equipment that measured
the quality of glass before it was drawn into a fiber optic. Hired 10
Product Engineers and managed the group.
I reported directly to the Vice President of Operations. I was
responsible for planning & running projects that would encompass cost reductions for several products where Net Test
purchased the license to manufacture these products
from companies in Europe. For one
product, I was able to reduce the cost from $100,000
to $40,000 per unit. I moved several
products from European manufacturing to US
manufacturing. The Product Engineering
group was responsible for the
following:
a.) Writing Engineering Change Orders (ECOs)
b.) Debugging electronic, electro-optic, &
electromechanical assemblies
c.) Monitoring various suppliers and drive
problems back to those suppliers
d.) Reduce costs where ever possible
Intel
Corporation (Client) – Hillsboro, OR.
Signal Integrity Engineer
Job
was to verify signals on various new motherboards (Laptop, Desktop, &
Servers) to make sure the signals met the design specifications. This required using high speed
oscilloscopes
to measure those characteristics.
Characteristics included
setup
times, hold times, slew rates, overshoot, undershoot, non-
monotomic rise and fall times, jitter,
glitches, and propagation delay
times. I
worked on the different buses on the boards.
These included Front
Side
Bus (FSB), AGP, PCI, PCI-X, PCIe, I2C, and memory buses.
PC
Validation Engineer – Hillsboro, OR.
The
job was to Validate the designs of newly designed motherboards.
Responsibilities
included the following:
a.) Do Design Reviews & Schematic Reviews
& attend review meetings
b.) Power up new boards that have never had power
applied to them
c.) Verify voltage sequencing (timing) on new
boards
d.) Run different test suites to stress the
boards
e.) Debug motherboards down to 'root cause' of
problems. This meant down to
component level. CPUs, Memory Controller Hubs (MCH), Graphic
Memory Controller
Hubs (GMCH), Serial Input/Output chip
(SIO), ICH, North and South Bridges,
and BIOS
Sr.
Sustaining Software Engineer – Hillsboro, OR.
The job was to sustain software for
Network Interface Cards (NIC).
Responsible
for verifying code errors and correcting them.
Preformed various
tests
to reproduce errors and then located the error in source code of the
software. Corrected the code, re-built the software and
released the code to
Intel's
customer base. All of the cards were
part of family of cards using IEEE
802.[ ].
NICs were Intel's Pro1000/100 and Intel's PRO 10GBE series of
adapters. Some of the code was written for DOS, EFI -32
and EFI-64 systems.
Most
of the source code was in C and some was in Assembly.
Year
2000 Evaluation Engineer – Hillsboro, OR.
Reviewed
over 2000 products that Intel had produced from 1980 to 2000 to
determine
if there was going to be liability problems because of the 'Millennium Bug'.
Used
Intel's Engineering Data Base, ECOs, User Manuals and/or the products to
determine if problems were going to
occur. Only iRMX (a real time operating
system) based on Unix, and several
motherboards that had old clock chips in them and only saved the last 2 digits of the year, had year 2000 problems. This saved Intel $2,000,000.
Sr.
Sustaining Engineer – Hillsboro, OR.
Sustained Development Tools
Organizations' (DTO) products while the organization closed
down. The hardware tools were In-Circuit Emulators
(ICEs). The emulators included all of the 8086, 8088, 80186, 80188, 80386, 80486,
Pentium Pro, 8051, 8044, 80196, & all flavors
of 80960. This allowed Intel to move
it's personnel to different organizations while consultants replaced Intel personnel in this organization
until the organization could be closed. Duties included writing the final ECOs and
other documentation. Gathering
all
of this Engineering documentation and distributing it to the proper
organization
inside
Intel who were now going to be responsible for the product, or making sure all
the
documentation
packages were correct before distributing them to vendors that bought these products from Intel. Packages included Bill of Materials (BOM),
Partial Approved
Vendors
List (AVL), latest schematics & mechanical drawings, source code (software)
and software environment (operating
systems, etc.) and any other documentation pertinent to the product. I was also
responsible for developing the ICE-960SA (final ICE). I lead a team
of 2 Engineers, mainly taking care of the hardware part of the shut down. This saved
Intel
over $40 million.
nCube
(Client) – Beaverton, OR.
Sr. Change Order Engineer – Product
Engineer
My
job was to straighten out the part and sub-assembly numbering system.
nCube
had already duplicate sub-assembly numbers for some of their
products
which made it impossible to write further ECOs and/or upgrade
sub-assemblies
for customers that had old versions of the product. I reviewed all
of
their products and determined which ones were duplicated and corrected
them
by using a Version Number. I then
disallowed any duplicate numbers by
making
sure the managers of the Engineering Data Office could only give a unique
number,
which would then be removed form the set of possible numbers that could be given out. This was accomplished by computer with daily
printouts. The numbering system is a standard xxxxxx-xxx.
Radisys
Corporation (Client) – Hillsboro, OR.
Sr. Hardware Validation Engineer
I was part of team that took older
motherboards developed by Radisys and validate the
design
after the boards were built lead free (RHOS).
These boards were sold in European countries
and as of July 1st of 2006, the European Union would no longer allow
boards in unless the boards were 'lead
free'. There were about 50 boards to
re-test and validate. This project saved over $2 million in
sales.
Sr. Embedded Software Engineer
I designed and wrote a Power On Self Test
(POST) for a slave i960 processor on a router motherboard. The master processor was i386EM. The router portion of the board was able
to
connect different types of networks.
These were Star, Ethernet, HDLC/SDLC, Apple Talk,
&
ISDN. Only the i960 could communicate
with any part of the networks. I wrote
the code in 'C' and i960 assembly. The POST took 30 seconds to run. I debugged the code using a In-Circuit Debugger. Developed a simple communication scheme to
communicate 'pass/fail' information
to master CPU through shared memory.
Shared memory meant there could
be significant memory bus contention if both CPUs tried to grab memory. But the
master CPU had other non-shared memory where it could run without creating the contention. The i960 could only communicate
to the outside world through the master CPU.
This meant using LEDs on the board
to have visual communication with the outside during debugging.
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