Project Manager Resume Profile in Word Format Free Download -->

Project Manager Resume Profile in Word Format Free Download

Sample Template Example of Beautiful Excellent Professional Curriculum Vitae / Resume / CV Format with Career Objective, Job Profile & Work Experience for Freshers & Experienced in Word / Doc / Pdf Free Download


Sarah Yan, Ph.D.
5 Stafford Ln, Andover, MA 01385
Home: 978-228-2586 Cell: 781-658-6186; Email: sarah.yan@gmail.com

Objective:Seek a challenging technical position in the areas related to communication, signal processing, image/video processing; and control systems.
Highlights
1.       15+ years industrial experience, as well as academic training, with focus on wireless communications, signal processing, control systems, and wireless communication protocols.
2.       Excellent analytical skills with theory/math, as well as with strong technical curiosity and engineering sense.  Self-motivated and self-directed.
3.       Proficient and hands-on with C (FLP and FXP) and Matlab, as well as CCSS and SPW. Fluent with assembly language and C programmingfor real-time multi-tasking applications.
4.       Experienced with Global/Multinational multi-site co-operation both intra-company and inter-company.
Industrial Experience
Samsung Mobile Solution Lab, San Diego, CA
Principal Engineer
Jan/2010 to Present
A.      Focus on WCDMA and LTE (OFDMA) technologies – Equalization, Joint Detection and Interference Cancelation; Timing and Frequency Synchronization/Tracking; Channel estimation; UE speed estimation; Adaptive and Optimal Filtering; (InterRAT) Handover; Noise power estimation; I/Q imbalance compensation; AGC; CQI and Tput optimization.
a)      My proposal on (interRAT) handover strategy was highly appreciated by technical and executive management.
b)      Identified the timing synchronization as the area for potential performance improvement and proposed ways to improve. Shared my experience and rigorous analysis with team.
c)       Provided mathematical guidance to the interference cancellation methods (simple detection and regeneration, as well as QLIC in particular).
d)      Exposed the fundamental needs and weakness (with channel modeling) for speed estimation, and proposed new metric in place of UE speeds.
e)      Promotealgorithm research methodologiesbalanced between inductive and deductivethinkings, systematic and heuristic approaches; as well as the need to understand fundamentals.
f)       Mathematically demonstrated the similarity between OFDM and FDD/TDD channel estimation, as well as channel estimation filtering. 
g)      Mathematically demonstrated why HSDPA needs a different AGC scheme than WCDMA R4. During debug, discovered one major deficiency of LLS. Unified team’s understandings on quantization noise modeling.
h)      Latest assignment is on Tput optimization. I was charged with the responsibility to make a goal-oriented plan which should cover every block of the signal chain including inter-layer SW optimization; multiple departments; activities on algorithm/simulation/ lab test/field test; equipment; resource; phase-by-phase strategy; time and schedule.


Mediatek Wireless (through acquisition), Woburn, MA
Manager of Algorithm Team; Project Manager.
Jan/2008 to Dec/2010
Analog Devices, Wilmington, MA
Manager of Algorithm Team since 2006
Sr. Systems Engineer and Team/Project Lead Since 2000
Sept/2000 to Jan/2008
A.      Focus on WCDMA/TDSCDMA/CDMA technologies with experience also on GSM/GPRS/EDGE/PHS, as well as knowledge of Femto-Cell; WiMAX;WiFi;GPS;BT; OFDM; Multi-Carrier; Smart Antenna; MIMO; SDR; Cognitive Radio; LTE and LTE advanced.
B.      Participation in Business, Marketing, Strategy and Customer/Partner Relationship.
C.      Participation in building ADI’s Asia Wireless Technology Center at Shanghai, and Taiwan Wireless Application Center

1.       3G TD-SCDMA receiver/transmitter design with Rel4, HSDPA, HSUPA, HSPA+
Mid-2003 to Dec/2010
a)      Technical lead for TDSCDMA chipsets with focus on algorithms and HW IP architecture. Contribution to transceiver signal chain architecture; algorithms design; HW IP architecture; SW/HW interactions; Complexity Analysis/Reduction; Customer/Partner Relation.
b)      Joint Detection (MMSE/ZF, FFT/MMSE) based inner receiver design; SBDFE and MS-BDFE; Channel Estimation (FFT and MMSE based); Frequency (FLL) and Timing Synchronization; Speed Estimation; Propagation Channel Classification; AGC; FLT and FXP simulation; Bit/Symbol Rate Processing (HARQ; AMC; Viterbi and Turbo decoding; Irregularity; LLR Soft-Symbol to Soft-Bit mapping; Scaling; CQI; SINR estimation).
c)       Working with DBB team on TDSCDMA HW IP architecture; Implementation and Verification; SW/HW interactions; Programming Model; Memory requirement; Bus Bandwidth Requirement; MIPS Budgeting.
d)      Working with ABB team on ADC and DAC dynamic range determination; Digital/Optimal filtering; and Timing control.
e)      Working with RFIC team on Filtering strategy; imperfection (I/Q Imbalance, DC, and Filters) compensation; link budget analysis; AGC; and Power control.
f)       Working with DSP team to incorporate special instructions for TDSCDMA chipsets.
g)      Working with partners (Datang/Leadcore at China; Sasken at India; RTX at Denmark) on L1 control SW; SW/HW interaction; Critical timing loop analysis; SW MIPS budgeting; and Systems Solutions.
2.       Study of LTE/LTE-A (FDD and TDD), as well as WiMAX
Early 2008 to Mid 2009
a)      FFT based OFDM modulation and demodulation; Techniques for reducing PAR.
b)      ZE and MMSE based channel estimation (data-aided); Channel interpolation.
c)       Time and Frequency synchronization. MIMO.
d)      First order complexity analysis and feasibility/architecture/requirement proposal.
3.       Advanced receiver for 3G WCDMA HSDPA
Late 2005 to early 2007
a)      Sub-chip level equalization; Chip level equalization; Symbol level equalization; Joint-detection.
b)      BLUE; Wiener Filtering; LMMSE and ZF; JD-BLE; GRAKE; and Kalman Filter.
c)       LMS and RLS based adaptive methods.
d)      Experience accumulated here provided great help to future TDSCDMA projects.
4.       Development of PHS/GSM dual-mode handsets using GSM handset chipsets and reference designs
Mid-2003 to  Mid-2005
a)      Proposed and validated a set of key technologies to enable GSM/PHS dual mode handsets by creatively using ADI’s GSM chipsets and reference designs without any change of the HW.
b)      The essential technologies include UL/DL Timing Synchronization; Equalization; Filtering Strategy; Coherent Demodulation of Pi/4 DQPSK; and Fractional Interpolation and Decimation.
c)       Some new functionality became part of standard ADI wireless chipset offering.
d)      Developed business strategy (primarily for UTStarcom at China and ACD at California) and several strategic partners for ADI’s wireless business.
5.       Algorithm and L1 SW development of 3G WCDMA/IS2000 systems
Sept/2000 to  Late 2003
a)      WCDMA receiver design: Channel Est; Rake and MRC; Frequency (FLL) and Timing (DLL) Synchronization; SINR estimation; Causal and Non-Causal Filtering; and Compressed Mode; Initial and target cell searching.
b)      Working with ABB team on ADC and DAC dynamic range determination; Digital filtering; and Timing control.
c)       Working with RFIC team on Filtering strategy; imperfection (I/Q Imbalance, DC, and Filters) compensation; link budget analysis; AGC; and Power control.
d)      Working with partners (Sasken at India) on L1 control SW.

MorphICs Technology, Silicon Valley, CA
Feb/2000 to Sept/2000
Sr. Systems Engineer

a)      Development of both transmitters and receivers algorithms for both WCDMA and IS95/IS2000 systems with focus on channel estimation; frequency/timing synchronization; code generation; link budget analysis; power control; initial and target cell searching.
b)      Flexible implementation architecture with distributed Pico-DSP cores.

Philips Consumer Communications, Silicon Valley, CA
March/1997 to Feb/2000
Sr. Systems Engineer; Technical Lead

A.      Key competence utilized and acquired: communication theory; signal processing; control systems; real-time operation systems and programming; IC and board level knowledge; field testing knowledge; fluent use of various lab equipments; multi-site co-operation.
B.      Promotion of sound engineering practices (re-entrance;  data/code protection; coding style; graceful degradation; and testing strategy)

1.       IS136/GSM tri-mode handset development
09/1999 to 02/2000
a)      Key player in physical layer and protocol (CC and RRM) SW development.
2.       IS95/IS2000/WCDMA algorithm development
06/1998 to 12/1999 
a)      Responsible for channel estimation, timing/frequency synchronization using C, SPW and Matlab.
3.       Dual mode (AMPS and Digital) IS136 chipset and handset development
3/1997 to 12/1998
a)      Key player and technical lead in the PHY and MAC layers SW development in both C and Assembly.
b)      Technical lead in development of standby mode and power saving features with exceeding expectation performance.
c)       Solved/Mitigated many very challenging HW/systems problems using SW workarounds many of which became the chipset producer‘s default recommendations (TA, Sleep Mode; Multi-Frame Boundary; Cell search; RSSI indication; Cell planning; Audio Control; AGC;SACCH handling; and Handover).
d)      Primary interface to IS136 Chipset Vendor (DSPC at Israel) and major interface to SW Partner (Isotel at Canada).
e)      Even found problems (and suggested solutions) for test equipments (IFR, WaveTek and HP), and also found problems in live wireless network (with Lucent equipment in Atlanta).

Northwestern Polytechnic University, Fremont, CA
Mid 1997 to Aug/2000
Part time Adjunct Professor

A.      Classes Taught: Digital Circuit Design; Communication Theory; and Introduction to Wireless Communications Systems.

Celwave – A subsidiary of Alcatel at Phoenix, AZ
Jan/1997 to March/1997
Title: Sr. Systems Engineer

A.      Major responsibility: Impedance matching scheme to maximize efficient transmission power for GSM/iDEN base-stations.
B.      Key competences utilized and acquired: Communication theory; control theory; wireless communication systems; circuit; micro-processor HW and SW in both C and assembly.

Transquest -- A JV of AT&T at Atlanta, GA
Aug/1996 to Dec/1997
Title: SW Engineer

A.      In AT&T training classes for about 3 months. Then rotated as a trainee in several departments (image/text compression; network management; metal detection; and customer services)

Institute of Automatic Control – Beijing, China
Title: Engineer and Sr. Engineer
Jan/1986 to July/1992
A.      Major responsibilities and Key competences utilized and acquired: Control theory; Signal processing; Electronics; Circuit Design; Micro-processor HW and SW; Computer communications.

Education
1.       Ph.D. in Electrical and Computer Engineering, University of Florida,
Aug/1993 – Aug/1996
1)      Focus: Control Systems; Signal Processing; and Communications.
2)      Dissertation: Determination of Stability of Nonlinear Dynamic systems Using Normal Form Theory.
3)      Key Contributor to an NSF grant.
2.       Ph.D. candidate in ECE, University of Vermont
Aug/1992 – Aug/1993
1)      Focus: Control Systems; Signal Processing; and Communications
3.       MSECE/BSECE from Shanghai, China
Aug/1979 – Jan/1986
1)      Focus: Control Systems; Signal Processing; Electronics; Computer SW/HW.

Patent applications/disclosures and Publications
1.       Cover RFIC; ABB; DBB; Algorithms; Architecture; and Systems. Cover WCDMA, GGE, PHS, and TDSCDMA.
2.       About 20 filed applications; 7 granted; andabout other 7 disclosed or to be disclosed –A partial List available upon request.
3.       Many internal and external publications –A partial list available upon request.

Major Industrial and Company Internal Awards
1.       Industrial Award for TDSCDMA Chipsets (MonacoLCR [Rel4] andLeMansLCR+ [Rel4]; as well as Laguna[HSDPA] and LagunaU [HSPA]) (Technical Lead).
2.       Reward from the partner(s) on the co-operation and efficiency(Technical Lead).
3.       The TDSCDMA BB Chipset was nominated for MediatekSpecial Contribution Award2009 (Technical Lead).
4.       WCDMA/TDSCDMA RF Transceiver received MediatekInnovation Award 2009 (Participant).

More Words on TD-SCDMA
1.       One of the pioneers/leaders in ADI/MediaTek on TD-SCDMA technologies and products of all 6 generations (from voice centric to HSPA+).
2.       Accumulative Sales: In magnitude of several USD$100M with magnitude of several 10M units.
3.       TD-SCDMA technology was cited as one of original/primary motivations for MediaTek to acquire ADI’s wireless handset chipset business.
4.       ADI/MediaTek chipsets have been the dominant solutions on market.



Misc
1.       US Citizen
2.       IEEE member; and the reviewer for many IEEE publications and conferences.
3.       Willing to relocate, as well as willing and able to travel worldwide.



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