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Rifail Shivan
                             Software Development, Integration and Test  Engineer
                                                    Project Manager and Business Analyst
                                                                    Active Secret Clearance
                                                                     (Hm) 610-215-7788
                           (Cp)  720-703-9977
          rifailshivan@gmail.com

SUMMARY OF WORK EXPERIENCE
Twenty plus years experience as a Software Engineer and Project Manager performing such functions as software system architecture specification, design, implementation, integration and hands on testing of embedded and non-embedded real time applications using OOA/OOD and SA/SD methodologies in organizations whose CMM ratings ranged from Level 2 to Level 5 along with custom development of three microprocessor based kernels. Project management duties include chairing weekly review meetings of other software engineers and IT personnel, formulating reports to higher management in the form of progress reports, providing technical guidance to team members and updating project schedules and deadlines.  Project team sizes have ranged from a small software engineering team of 3 to an IT division numbering 30. This development career also includes OSI stacked protocol communication and network applications on a wide variety of platforms for government, commercial, aerospace, DoD and IT clients.  DoD projects among others include 5 electronic warfare (EW) projects.  Recent projects have included system architecture verification testing of multi-bladed PPC/Intel servers in a high assurance safety environment.

Position Desired: Direct, contract to direct, contract in Central Texas, then Texas, then out-of-state.

EDUCATION
B.A. Mathematics/Engineering, University of Texas, Austin.  Continuing education includes Agile Essentials, Dell, Round Rock, Texas, Windriver Arinc 653 BSP and Device Driver Course, Grand Rapids, Michigan; IEEE: Sun Programmer for the Java 2 Platform; C++ for C Programmers, Hands On Technology Transfer, Houston, Texas; Java: Introduction and Intermediate, Infotec, Austin, Texas; UNIX Hands-On Workshop and Computer Network Architecture and Protocols at Learning Tree International, Washington, D.C.; Software Engineering with Ada, Sundstrand Corp. ,Rockford, Illinois.

PROFESSIONAL AFFILIATIONS:  IEEE Senior Member, AOC

SKILLS:  Languages: Python 2.6.6, Ada83,  Ada95, Microsoft Visual C++, GNU C++, GNU C, Java, Rxx script, Korn shell, PLM, HTML, XML,   Fortran,  Jovial;  assembly languages for Intel 8085-80186,  8051,  Motorola 68000-68020,  Zylog Z8000-Z8002,  Fairchild 9450 (Mil-Std 1750), ITT CX2.

Tools: KVM, Easy Eclipse, Microsoft Visual Source Safe, Microsoft Project, Matlab, GNAT/GPS Tool Set, Microsoft Visual Studio, Windriver Vxworks Integrated Development Environment for PowerPC and PCI bus, DOORS, Dimensions, GNU Debugger (gdb), AIX dbx, kldb, xldb, X Windows/Motif X11R5, CMVC, HP User Development Environment (UDE), Techtronix Logic Analyzer, ICE and I2CE for Intel, Zylog, Motorola and Fairchild chip sets, on board AMD and DSC debuggers, VAX Notes, AIX and AT&T C compilers, GNU C++, C compilers, TCI C compiler, VAX VMS C and Fortran compilers, VAX VMS Ada cross compiler for Intel 80186.

Embedded Prototypes Delivered:  Smiths Aerospace, SPEC, Tracor Aerospace, Gould Ocean Systems Division, GE Aerospace.

Driver Domain:   Custom FPGA, PCI, PCM, PCI-X, VME, Mil-Std 1553, ARINC-429, RS-485, IBM/SCO UDI, IMU

UNIX Domain:   Red Hat Linux Version 4.1.2.1.8, Solaris 8, AIX 3.2, 4.3 and 5.0, SCO Unixware 7.1, AT&T SVR4.2.

RTOS Domain:  Windriver VxWorks 5,4 and PSC 1.3.1 (Arinc 653), Ecoscentric eCos, Digital Switch Corporation EKOS/CEKOS, Hunter and Ready VRTX, TCI's MPCEX, customized kernels for Intel 8085-80186, Zylog Z8000-Z8002, Fairchild 9450(Mil-Std 1750), VAX VMS, Vulcan OS.

EW Domain:    AN/ALQ-72 Radar Jammer, AN/ALQ-212 (ATIRCM) Advanced Threat Infrared Counter Measure, AN/ALE-47 Counter Measures Dispensing Set, AN/MLQ-34 Tactical Jammer, proprietary pixelated UV sensor

Development Standards: DO-178B, Mil-Std 2167A, 2167, 1679, proprietary GE Aerospace, Dell Agile/Extreme


EMPLOYMENT HISTORY

Dell, Inc., Round Rock, Texas 11/2010 to 09/2011                                                         Software Integration and Test Engineer
Austin Data Center: Monolith/Modular PowerEdge R720 Server:  Integration and test of Dell Bios, CPLD, RAID and on board embedded Linux based 12G iDRAC7 firmware consisting of IPMI, Racadm and WS-MAN on an Intel/Windows Server 2003 platform. Test scripts are developed and deployed according to an Agile development environment with daily scrum meetings organized into Sprints.  In this Agile environment, new test scripts are developed, integrated and tested using a custom modification of Python package, CLIP_V3 and an automated  test software package, TestBench.  Daily activities consist of upgrading three servers (code named Orca, Mojo, Madone) with the latest firmware, executing 26 tranches of tests on three servers simultaneously, analyzing the test results, determining root cause of failures, submitting defect reports and managing the correction efforts of test script authors and firmware developers.  In addition to the daily automated test efforts, single tests and other ad hoc tests are executed to demonstrate system failures. This effort focuses on validating the power management and license management features of the PowerEdge server to be released 3rd quarter, 2011.

ITT EW/ES Clifton, New Jersey  10/2009 to 2/2010                                      Senior Software Development and Test Engineer
AN/ALQ-172:   Design, implementation, integration and test of Block Cycle 4 upgrades from the B52 Agile/Agile Jammer configuration to the C130 Agile/Agile Jammer configuration. This was an effort to move the Low Band (2 GHz to 7 GHz) Jammer characteristics as proven on the B52 to the C130 and involved a 100% assembly language effort using the ITT proprietary CX2 chip. 
See http://www.janes.com/articles/Janes-Electronic-Mission-Aircraft/AN-ALQ-172-V-United-States.html

GE Aviation, Grand Rapids, Michigan  11/2008 to 3/2009                            Senior Software Development and Test Engineer
C130 AMP:  Review, modification, integrate and execute test procedures of the C130 AMP Future Navigation System as part of the embedded Flight Management System hosted on a PPC using Visual Basic, DOORS and Dimensions in accordance with DO-178B.

BAE,  Nashua, New Hampshire     2/2008 to 9/2008                                                                    Senior Software Test Engineer
AN/ALQ-212: Design, implementation, integration and test of modifications to Acceptance Test Procedures (ATP) embedded in the operation flight program (OFP) of the Advanced Threat Infra-Red Counter Measures (ATIRCM) Jammer using Ada95, Rational Apex, Rational Clear Case, Rational Clear Quest, GPS  and Matlab on Red Hat Linux, Sun Solaris  and Windows XP classified platforms. 
l

Smith’s Aerospace, Grand Rapids, Michigan   4/2004 to 11/2007  VTP System Architect, Software Test Engineer, Project Manager
C130 AMP: Design, implement, integrate and test of 28 KLOC Ada95 Resident Test Program (RTP) and the Verification Test Program (VTP) for the Boeing C130 Mission Processor and Special Operations Processor, a twelve blade server.  These two applications are multiple partitioned multiple threaded applications operating in accordance with Arinc 653 and distributed across twelve 800 MHz PPC’s single board computers communicating across a VME backplane with three specialized I/O cards housed in two chassis’.  The VTP performs tests on the IOM (R2-422, RS-485, A429, Discretes), the GPM (Ethernet, 1553, BIT), the PSM (Power Supply Module), OVM (Overlay Video Module) and the UVM (Underlay Video Module).  Managed the efforts of a team of five.
767 Tanker:   Design, implement, integrate and test DO-178B NVM Test Application along with modification of associated Test Procedures.  Design, implement, integrate and test modifications to the Tanker Drogue Controller.
787 Dream Liner:  Modification of existing and adding new functions to Smith’s proprietary RTOS (GPMON/BIOS with prioritized preemptive multitasking kernel) used on all PPC baseboards including the most recent PPC baseboard with 3 PPC’s running in parallel.  Functions included but not limited to are PPC configuration modification and retrieval and various testing functions.
Advanced Embedded Initiative: A company approved independent embedded engineering effort to establish the feasibility of replacing the Windriver VxWorks embedded development system using third party Free Software Movement embedded platforms based on an i386 architecture.  C, C++ and 30% Intel 386 assembly.

Conic Software Engineering, Austin, Texas         7/2002 to 4/2004                                            Software Design and Test Engineer
Research and Development:  Specification, design and early implementation of Reduced Complexity Parallel Computer (RCPC) employing 1GHz i386 hardware, the ECOS embedded BSP and an I/O fabric 
d of drivers for Ethernet packets, USB 2.0, PCI and Low Voltage Differential Signal (LVDS) interfaces.
Applied Analysis:  Preliminary specification for a Common Processing Platform for a seven level OSI stack application using CAN as the physical layer compatible with NEMA/2000 and ISO 11783 communication standards.

SPEC, Austin, Texas                7/2000 to 12/2001                                                      Software Engineer, OnBoard Systems Group
Specification, detail design, implementation, integration and test of two prototype ground support solid state recording devices using embedded C, VxWorks, a custom back-end DBM, twin XPC8240 “Kahlua” PowerPC’s with independent PCI buses, RACEWAY-2 dual crossbar sdram, VME PIO and IRIG bus interface and two custom device drivers interfacing with FPGA’s using PCM cards and PCI-X.  These prototype systems are 2 Gbs solid-state data recorders that have been successfully flight-tested.   See http://www.onboardsys.com/products_hd.html

IBM, Austin, Texas                 2/2000 to 7/2000                                                                      Software Engineer, Monterey Project
The Monterey Project: A consortium of IBM, Intel and SCO primarily devoted to porting AIX and SCO Unix to the Intel 64 bit Itanium chip, and design and test of UDI, a Uniform Device Interface that will provide an industry wide software standard for the attachment of I/O devices and software drivers to a wide variety of Unix platforms. My participation was to perform implementation, testing and revision of UDI common code and OS dependent code in the form of POSIX tests, to bring up the UDI on AIX and SCO 64 bit versions and to perform testing of various third party device adapter boards. See http://www.projectudi.org

Caldwell Tree, Austin, Texas          8/97-9/99                                                       IT Manager, Assistant to the President                                                                                                                                  
Managed a five-person team to reorganize a 3rd generation services company prior to sale.  Designed, implemented and tested new Ethernet LAN systems with associated office software packages and custom X Windows software. Designed and implemented company web site using HTML.  Company sold September 10, 1999.

GTECH, Austin, Texas                  4/97-8/97                                                                      Project Manager, Software Test Engineer
Managed a three-person team to diagnose and repair software failures of GTECH's Gaming On-Line System (GOLS), a VAX/VMS triplex Fortran multitasking on-line system connected to approximately 16,000 lottery terminals. This effort required the establishment of a separate GOLS simulation lab for the rapid response that GTECH required.  Downtime penalties for the Texas Lottery System were $1,000/minute. See http://www.gtech.com/

AMD, Austin, Texas                    10/96-3/97                                                                              Software Design and Test Engineer 
Designed, implemented and tested embedded TAP (Test Access Point) function in AMD's Phox 432 prototype cordless telephone chip set. This function incorporated 26 test points in the Phox 432 (Intel 8051) C and assembly language environment and tested the bit error rate of the 900 Mhz CT2 wireless peer-to-peer OSI like communications protocol.  Developed Test Plan and Test Specification.   C and 20% Intel 8051 assembly.

Caldwell Tree, Austin, Texas         1/94-9/96                                                                                                      Software Engineer 
Designed, implemented and tested an X Windows/Motif/C GUI based billing and client information system using an AT&T UNIX platform .

IBM, Austin, Texas                   9/92-11/93                                                                                                            Software Engineer
Designed, implemented and tested SoftDist (originally known internally as AusText and Opera), an X Windows/Motif/C GUI application for the worldwide collection, selection and distribution of AIX PTF's (Program Temporary Fixes) on the Risc 6000 AIX system.

Caldwell Tree, Austin Texas           2/91-9/92                                                                                     Software Engineer
Designed, implemented and tested custom circular LAN protocol using three wire nonstandard DTE/DCE cabling employing a three layer peer-to-peer OSI protocol stack.  PLM and 20% Intel 8088-Intel 8086

DSC, Plano, Texas                     2/90-2/91                                                                             Software Integration  and Test Engineer  
Custom build to a customer’s specification and test a five layer OSI embedded digital network for Digital Switch Corporation's (DSC) Class 4 long distance telephone switch.  The physical layer consisted of RS232, RS449 and V35, the link layer consisted of SDLC and HDLC, the network layer consisted of X25, the session layer was DSC proprietary and the application layer consisted of FTP and MTP, an MCI continuous session proprietary transfer protocol.  100% Zylog Z8000-Z8002.

Conic Software Engineering, Austin, Texas               8/89-2/90                                                               Software Design Engineer
Entrepreneurial effort to specify and design a rapidly deployed passive search, acquire and track (PSAT) aircraft detection system using a pixelized sensor system architecture, digital signal processing in software and a radio uplink.

Sundstrand Corp., Rockford, Illinois  4/88-7/89                                                                       Software Design and Test Engineer
Redevelopment and test of the embedded Built-In-Test function of the Bus Control Unit and the Generator Control Unit controlling the 90 KVA power generators on the uncertified Boeing 747-400 including custom BIOS modification for Intel 80186 microprocessor. Applied R&D effort to convert PLM to Ada.  PLM, Ada and 20% Intel 80186 assembly language.

Tracor Aerospace, Austin, Texas       2/84-2/88                                                                        Software Design and Test Engineer
                                                                                                                                               Project Manager
Advanced Engineering:  Software simulation of advanced pixelized UV and laser detection system.
Countermeasures: Project Manager of five-man team.  Full specification, design, implementation, integration, testing and delivery of prototype embedded advanced development model of AN/ALE-47 Counter Measures Dispensing System and associated ground support equipment including custom BIOS development for Fairchild 9450 microprocessor and 1553 Mil-Std bus.  Used OOA/OOD methodology along with excerpts from Structured Design methodology.  Developed and delivered Tracor’s first Software Development Plan.  Derived full set of development documents including Test Plan and Test Specification.  This was a CMM/Level 3 effort. 100% Mil-Std 1750 assembly. See
Ground and Airborne:  Project Manager of three-man team. Preproposal functional analysis and preliminary embedded design of front line of battle mobile jamming unit, the AN/MLQ-34 TACJAM.   Used OOA/OOD design methodology.  Developed and delivered Tracor’s second Software Development Plan. 
Communications:  Implementation, integration, testing and delivery of 10,000+ lines of embedded C as a fourth security level in a five layer OSI stacked protocol World Wide Military Network Authentication Service (WISNAS) including custom BIOS modifications.  C and 10% Motorola 68000, 68010 assembly.

Gould Ocean Systems, Cleveland, Ohio 11/82-11/83                                 Software Design and Test Engineer, Project Manager 
Project manager of four man team  Specification, design, implementation, integration, testing and delivery of prototype embedded Autopilot Interface Circuit Card Set (AICCS) of midsection of ADCAP Mark 48 torpedo with associated submarine based support equipment including custom BIOS development for Intel 8085 microprocessor.  Derived Functional Specification, Design Specification, Test Plan and Test Specification.  This project used a structured analysis/structured design methodology within a CMM/Level 4 engineering organization.  Created Gould’s first Software Development Plan for this project.  100% Zylog Z80 and Intel 8085 assembly language.

GE Aerospace, Utica, New York        1/82-11/82                                                                                       Software Design Engineer 
Specification, design, implementation, integration and testing of prototype embedded search, acquisition and tracking application for the target digital processor in the Northrop Tigershark F-20 (F-5G) lookdown-shootdown radar including custom BIOS development for  Mil-Std 1750 microprocessor and 1553 bus.  This project used a combination of OOA/ OOD and structured design methodologies in a highly structured CCM/Level 5 Software Engineering Group.  100% Mil-Std 1750 assembly. See http://www.military.cz/usa/air/post_war/f5g/f5g_en.htm

Gould Ocean Systems, Cleveland, Ohio 1/81-12/81                                 Software Design and Test Engineer, Project Manager
 Project management of a three-man team to redevelop a six-degree of freedom simulation of the ADCAP Mark 48 torpedo using structured analysis/structure design methodology.  Derived functional specification, design specification and test specification.    Performance of new simulation verified by in-water test.

Boeing Flight Simulation, Renton, WA. 1/80-12/80                                                                   Software Design and Test Engineer 
Modified and tested real time man-in-the-loop six degrees of freedom flight simulation of all 747 models with emphasis on pitch and roll autopilots.  Accumulated 1000+ hours’ flight time in Redifon real time flight cabin.  Fortran and 10% Vulcan assembly.



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