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Equipment Engineer Sample Resume Format in Word Free Download

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                                                Karlos Calhoun
                                                30115 Summerfield Loop. SE
Pittsburg, OK  30554
725-549-3542 (Work Cell)
350-910-3612 (Personal Cell)
Karlos_calhoun11@gmail.com


Career Objective:
To use my experience in the semiconductor industry in a process / equipment engineering position to support manufacturing or R&D areas.  My semiconductor career focus has been on plasma processing although I am open to work in other process areas and have worked in these areas during integrated projects.  My experience is primarily in silicon processing, but has included some MEMs and GaAs projects.

Work Experience

04/06 - Present:  Intel Corp.; Rio Rancho, NM
-  Currently working as a process / equipment engineer in support of plasma etch and dry clean systems.  Responsibilities include defect reduction / control, cycle time and process improvements.  The primary focus is on the newest technology node for microprocessor manufacturing.  This work included an assignment and transfer of key plasma technologies from the primary development site.

07/04 - 04/06:  Tokyo Electron Ltd; Austin, TX  
-  Worked as a field process engineer to support dielectric etch systems at local customer sites.  This work included development and testing of new hardware to eliminate backside polymers and throughput enhancement process development.

1/02 - 06/04:  Austin Integrated School District; Austin, TX      
-  Achieved certification and taught High School Physics/Chemistry and Biology for grades 9 and 10 at Austin High School.  Classes included Honors and grade level sections.

5/00 - 01/02:  Applied Materials; Austin, TX     
-  Program manager for the International SEMATECH (ISMT) account.  Responsible for all AMAT equipment and projects at ISMT including front-end, interconnect and yield management/metrology areas.  This included development of new business and projects with ISMT.   Primary focus is on meeting equipment and project needs for the ISMT 300 mm transition project.

7/93 - 5/00:   Novellus systems (Gasonics International);  Austin, TX
-  Applications  manager and engineer responsible for central region process support for Gasonics plasma ash and clean equipment.  The management role included supervision of  process engineers on all accounts and included direct process engineering support on key accounts.  The engineering work included support of standard silicon processing and some MEMs  and GaAs work as well with major customers. The first 5 years were process engineering support of multiple accounts for various applications.  This work also included direction of customer demos at the development lab located at CA headquarters.  Additional responsibilities included corporate-wide process training.

12/90 - 7/93:  SEMATECH (assignee from IBM Burlington, VT); Austin, TX
-  Worked as an assignee engineer at SEMATECH.  Projects included: 1)  Characterization of process-induced damage and contamination effects for semiconductor devices.  This work included several equipment and process evaluations including work that was used in development of a new ICP etcher; 2)  Final development and technology transfer of ECR etch equipment and evaluation project to member companies.

3/85 - 12/90:  IBM Corp;  Burlington, VT
-  Worked as a plasma process engineer in support of CMOS DRAM and logic development and manufacturing.  This work involved extensive collaboration with the East Fishkill ASTC and Yorktown Heights research and development facilities.  Specific responsibilities included: 1)  Sustained manufacturing of 4 MB DRAM process in 8” production fab; 2)  Development of 16 MB and 64 MB DRAM and logic derivative production, including process design, DOEs and pilot processing support.  My focus was on plasma process development and the integration of this with the full process flow; 3)  Research and development activities including RIE, MERIE, excimer laser dry processing as well as E-beam Proximity Mask process development..

Intellectual Property:

Authored over 20 semiconductor technology invention disclosures that have been granted as patents or published in technical bulletins.


Representative Publications

Co-authored over 20 technical publications related to semiconductor processing (list available upon request).


Education
M.S., Chemical Engineering, Clarkson University; Potsdam, N.Y., May 1985; GPA=4.0/4.0, M.S. Thesis:  “The Kinetics of CF4/O2 Plasma Etching of Polymers”

B.S., Chemical Engineering, Clarkson University; Potsdam, N.Y., May 1982; 
GPA= 3.8/4.0.  Graduated with Great Distinction Honors.




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