Senior Hardware Engineer Sample Resume Format in Word Free Download -->

Senior Hardware Engineer Sample Resume Format in Word Free Download

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NOAH  CASTILLE
309 SW Sagert Street #103
Tualatin, OR 97001
(503) 612-9876
noah@hotmail.com



I am seeking a VHDL related Engineer Position in the Los Angeles area.  I am currently working for a company that designs Heads-Up Displays for the aeronautics field.  I have experience in both VHDL RTL design and synthesis (Xilinx), and in VHDL behavioral test benches (ModelSim/QuestaSim).  I have experience testing to timing constraints, for code coverage, and for RTCA DO-254 compliance, as well as experience debugging clock domain crossing violations.  I have worked with VHDL interfaces for RS-170A, DVI digital mage protocol, and Fibre Channel protocol.  I also have experience in the telecom field with DS3, DS1 and Fiber Links.  I also have some board level design experience.  I feel I would be an asset to you company and hope to hear from you soon. 

WORK EXPERIENCE

Rockwell Collins Flight Dynamics, Portland, OR; Senior Hardware Engineer, August 1994-August 1995, March 2003- present.
* Design VHDL FPGA which included ARINC429 and Built-In-Test interfaces.  (Xilinx)
* Design VHDL Test Benches to perform FPGA and PLD testing which included I2C, RS232, ARINC429, Fiber Channel, DVI image protocol, and RS-170A Video Signal, and Built-In-Test interfaces.  Debug VHDL designs for clock domain crossing violations, for code coverage, and for adherence to RCTA DO-254 coding standards.  Sometimes led the verification team. (ModelSim/QuestaSim, Active-HDL, test scripts)
*Re-design of I/O boards for cost reduction, for implementation of a new synchro-to-digital converter, and for the addition of lightening protection.  (Orcad)
* Reliability Predictions.  (MIL-217)

Rockwell Collins Flight Dynamics, Portland, OR; Senior Software Engineer, August 1995-March 2003
* Software/firmware development of an embedded system using C. The product is a Heads-Up Display that provides aircraft flight and landing guidance.
* Develop, perform and document a suite of built-in tests for the embedded system using embedded C test code, in-circuit emulators using Assembly Language, and test scripts.
* Software and system test of the end product using test scripts.
* Modifications to the software build process and build scripts.
* All software development, testing and documentation done in compliance with requirement, coding and traceability standards of the FAA.

NEC America, Hillsboro, OR; Design Engineer, June 1989-August 1993
* Design of ASICs for digital multiplexers for DS3 and DS1 telecom applications.
* Functional testing and Fault testing of ASICs.
* Design of a DS3 Signal Generator using VHDL for test purposes.
* Design of a -48VDC to +/-5VDC power supply card to power a 30 card system using off the shelf power modules.
* Design of the power supply monitoring and control card for the FD-6 wall mount version of a DS1 series multiplexer.
* Characterization testing as per Bellcore and CCITT specifications of a DS1 system output.
* Reliability calculations.
* PCB layout.

ADC Kentrox, Portland, OR; Engineer Intern, Summer 1988
* Re-design of the fiber optic/coaxial interface for a DS3 repeater.

OTHER TECHNICAL SKILLS
C, Assembly Language, PLM, Basic, Fortran, Linux, Unix, DOS, Windows, MS Word, Excel, Access, 8051, 80960 and 80186 microprocessors, Motorola MPC603e RISC processor, I2C, RS232, ARINC429, RS-170A Video Signal, Fibre Channel protocol, DVI image protocol, in-circuit emulators, PLDs, Xilinx, VHDL, ModelSim/QuestaSim, Active-HDL, IKOS Simulator, Orcad, Spice, Test Scripts, Item Toolkit Reliability Prediction Software.

EDUCATION
Oregon State University, Corvallis, OR; BSEE, June 1989

MISC
I have completed undergraduate level and graduate level courses in Digital Signal Processing.  I have completed on-site and off-site training on Grounding and Shielding, and Designing for EMI compliance.

Reference available upon request.


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