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                                                 Anirban.K      

             Current Address: 47/1, Om Apartments, 3^rd Cross, Natures Garden, Bangalore                 

                                           Email: anirban@gmail.com

                                                          

Vision for Future

Having the motto “Will to work and work to win” and being interested in Microelectronics my objective is to seek

a challenging Position in Semiconductor Industry

Main Competencies/Skills

                                        

Digital Design Principles (Digital Electronics)

ASIC (Front End Design)

FPGA  & CPLD

RTL Design & Logic Synthesis

Hardware Descriptive Languages learned

Verilog HDL

VHDL

EDA Tools learned & worked with

Design Entry Tools                            Simulation Tools                        Synthesis Tools

Xilinx Foundation ISE Series             Modelsim (Mentor Graphics)       Leonardo Spectrum

ALTERA MAX PLUS2                            ORCAD PSPICE                       Synopsys FPGA Express     

ALDEC Active HDL                                                                              Synplicity’s Synplify                   

                                                                                                                      

Industry Experience

Relevant Experience: 1.3 Years as an Intern & Trainee Design & Verification Engineer

Project1.

Title                          : “Serial Interface Development for Real Time Applications”

EDA Tools Used          : Xilinx ISE & Modelsim (Simulation Tool)

HDL used                   : Verilog

A Brief Description of the Project: 

The Project consists of 5 Parts.

1.Understanding of working Principle of the Serial Interface

2.Baud Generator                              3.Transmitter                          4.Receiver

5.Integration of Transmitter & receiver Blocks

The Design creates:

1.An 8-Bit General Purpose Output Port, controlled by any character received on the Serial Port.

2.An 8-Bit General Purpose Input Port. The State of the Port is sent back to the PC every time a character is received.

My Role in the Project:

Design of Transmitter and Receiver Blocks using HDL & EDA Tools.With the given specifications for Baud Rate

and format of data the Blocks were designed.

Target Application: Home Automation System- Accessing of Home Appliances through Internet.

Other Assignments I am working with & worked are

1) USB2.0 Interface Development:

     EDA Tools Using         : Xilinx ISE & Modelsim (Simulation Tool)

     HDL using                  : Verilog

A Brief Description of the Project: 

For the Interface of Multimedia Data between PCs and Peripheral Components, the USB2.0 Interface Chip is being widely used. The USB2.0 interface Chip Supports the High Speed (HS-480Mbps) and Full-Speed (FS-122 Mbps) data rates.

2) Micro UART Implementation on FPGA:

    EDA Tools Using         : Xilinx ISE & Modelsim (Simulation Tool)

    HDL using                  : Verilog

A Brief Description of the Project: 

The micro-UART is a fully functional, synthesizable, universal asynchronous receiver transmitter core. The core is configurable and extremely compact. A typical synthesis will consume less than 55 flops. The receiver and the transmitter operate independently, and each can be selectively disabled for synthesis.

Due to its modularity and configurability and size, the micro-UART core is ideal for system-on-chip or as embedded processor peripherals. There is no restriction on the highest baud rate as long as the PLD device technology can support it.

3) 8- Bit ALU Design

    EDA Tools Using         : Xilinx ISE & Modelsim (Simulation Tool)

    HDL using                  : Verilog

4) PWM & 1-Bit DAC (For MP3 Player)’:

Take one pin of an FPGA, connect a speaker and listen to an MP3? Sure. In this Project we used a PC to decode an MP3, and then send the decoded data to an FPGA that is configured, as a one-bit DAC.The Decoding Software was readily available from Project Guide.

EDA Tools Used          : Xilinx ISE & Modelsim (Simulation Tool)

HDL used                   : Verilog

Other Projects I completed:

1.    News Paper Vending Machine

2.    Music Box

3.    RC Servo Control

Technical Papers Presented:

Ø  Technical Paper on “SRAM or FLASH: Which is the best Technology for FPGA” presented at

Department of Electronics, Pune University, Pune.

(Source: ECN Asia)       

Educational Qualifications

Sept-04   1-Year P.G Diploma in VLSI & Embedded Systems Design from University of Pune

Aug-05

Nov-00    B.Tech with Electronics & Communication Engineering from JNTU-Hyderabad with 61%

July-04

July-97    Intermediate from S.R Junior College (Board of Intermediate-A.P) with 85%

Apr-99

Jun-96     S.S.C from Government High School for Boys (Board of Secondary Education-A.P) with 78%

Mar-97

Personal Profile

Name                       :   Anirban Kundojjula

Date of Birth             :   15-06-1982

Linguistic Skills         :   English, Hindi and Telugu (Mother Tongue)

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