curriculum vitae português free download

curriculum vitae português free download

Sample Template Excellent Resume / CV Format with Career Objective forBE in Electronics Communication Engineer professional with, Job Profile & Work Experience for Freshers & Experienced in Word / Doc / Pdf Free Download

CURRICULUM VITAE


DEEPIKA. K.
281, Bay Leaf Street,
Tirunelveli Town-627 041                                         Email:   deepika@yahoo.co.in

                                                                                    Phone:    0462-2334091

Career Objective:

To secure a challenging position where I can effectively contribute my skills as Software Professional, possessing competent Technical Skills.

Academic Qualifications:
Course
Name of the Institution
Board/University
Year of Passing
%

B.E
(ECE)

                                                            Cape Institute of Technology, Levengipuram


Anna University
2006

76.64%

Higher Secondary
Sarah Tucker Higher Secondary School, Tirunelveli
Tamil Nadu State Board
2002
88.40%
SSLC
Sarah Tucker Higher Secondary School, Tirunelveli
Tamil Nadu State Board
2000
76.64%








Computer Skills:
Operating System                           MS-DOS, Windows, Unix
Languages                                      C, Java, VHDL, Verilog
Packages                                         MS Office, FOXPRO


Area of Interest:

·        Microprocessor 8085

  • Digital Circuits
  • VLSI (VHDL Programming)
Co-curricular Activities:
  • Undergone Implant Training in Production Department of UCAL FUEL SYSTEMS LTD, Pondicherry.
  • Presented a paper in “Cyber Crime” at Cape Institute of Technology, Levengipuram
Academic Project:
Project Title:                    “Noise Reduction Filtering
Duration:                          1 month
Software Used:                 MAT LAB
Description:                  
The Project entitled “Noise Reduction Filtering” enables us to explore noise reduction in images using linear and non-linear filtering techniques applied to several kinds of noise.

Project Title:                    “Design and Implementation of a Self Checking         Scheme for Railway Trackside Systems
Duration:                          3 months
Language Used:               VLSI (VHDL)
Software Used:                 Active HDL, Xilinx
Kit:                                    FPGA
Description:       
The Project deals with the self-checking design of the Transmission and Reception Blocks of a Trackside Control System used for railway applications. It features self checking ability with respect to a wide set of possible internal faults, representative of the most likely faults for FPGA implemented system

Personal Profile:
Date of Birth:                                  13/06/1985                                                     
Sex:                                                Female
Marital Status:                                Single
Father’s Name:                               Mr. C.Karuppasamy
Languages known:                          English, Tamil
Nationality:                                     Indian
 Declaration:             
       I hereby declare that the above-mentioned information is correct up to my knowledge and I bear the responsibility for the correctness of the above-mentioned particulars.
            (K.Deepak)

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